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src: cpu: aarch64: move jit_sve conv above acl conv in convolution_list #2403

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merged 2 commits into from
Jan 16, 2025
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src: cpu: aarch64: move jit_sve conv above acl conv in convolution_list #2403

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38b43bb
src: cpu: aarch64: enable post-ops in jit_sve_1x1 conv
michalowski-arm Jan 10, 2025
8537c61
src: cpu: aarch64: move jit_sve conv higher in convolution_list
michalowski-arm Jan 10, 2025
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2 changes: 2 additions & 0 deletions src/cpu/aarch64/jit_sve_1x1_conv_kernel.cpp
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Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
/*******************************************************************************
* Copyright 2021-2023 Intel Corporation
* Copyright 2021-2024 FUJITSU LIMITED
* Copyright 2024-2025 Arm Ltd. and affiliates
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -620,6 +621,7 @@ status_t jit_sve_1x1_conv_kernel<isa_>::init_conf(jit_1x1_conv_conf_t &jcp,

/* arch check */
if (!mayiuse(isa_)) { return status::unimplemented; }
jcp.isa = isa_;

if (!everyone_is(data_type::f32, src_d.data_type(), weights_d.data_type(),
dst_d.data_type())) {
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6 changes: 3 additions & 3 deletions src/cpu/cpu_convolution_list.cpp
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/*******************************************************************************
* Copyright 2019-2024 Intel Corporation
* Copyright 2020-2024 Arm Ltd. and affiliates
* Copyright 2020-2025 Arm Ltd. and affiliates
* Copyright 2020-2024 FUJITSU LIMITED
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand Down Expand Up @@ -145,14 +145,14 @@ const std::map<pk_dt_impl_key_t, std::vector<impl_list_item_t>> &impl_list_map()
CPU_INSTANCE_AARCH64(jit_sve_1x1_convolution_fwd_t<f32,f32,f32,sve_512>)
CPU_INSTANCE_AARCH64(jit_sve_convolution_fwd_t<f32,f32,f32,sve_512>)
CPU_INSTANCE_AARCH64(jit_uni_dw_convolution_fwd_t<sve_256,data_type::f32>)
CPU_INSTANCE_AARCH64(jit_sve_1x1_convolution_fwd_t<f32,f32,f32,sve_256>)
CPU_INSTANCE_AARCH64(jit_sve_convolution_fwd_t<f32,f32,f32,sve_256>)
CPU_INSTANCE_AARCH64_ACL(acl_depthwise_convolution_fwd_t)
CPU_INSTANCE_AARCH64_ACL(acl_indirect_gemm_convolution_fwd_t)
CPU_INSTANCE_AARCH64_ACL(acl_gemm_convolution_fwd_t<f32>)
CPU_INSTANCE_AARCH64(brdgmm_dw_convolution_fwd_t<sve_256>)
CPU_INSTANCE_AARCH64(brgemm_1x1_convolution_fwd_t<sve_256>)
CPU_INSTANCE_AARCH64(brgemm_convolution_fwd_t<sve_256>)
CPU_INSTANCE_AARCH64(jit_sve_1x1_convolution_fwd_t<f32,f32,f32,sve_256>)
CPU_INSTANCE_AARCH64(jit_sve_convolution_fwd_t<f32,f32,f32,sve_256>)
CPU_INSTANCE_X64(jit_uni_ncsp_convolution_fwd_t)
CPU_INSTANCE(gemm_convolution_fwd_t)
CPU_INSTANCE(ref_convolution_fwd_t)
Expand Down
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