Merge pull request #125 from os-fpga/import_fix #491

	name: Read Verilog Workflow

	on:
	push:
	pull_request:

	jobs:
	linux-gcc:
	if: ${{false}}
	name: ${{ matrix.mode }}

	runs-on: ubuntu-20.04
	defaults:
	run:
	shell: bash
	strategy:
	fail-fast: false
	matrix:
	mode:
	# - verilog
	- edif
	env:
	MODE: ${{ matrix.mode }}

	steps:

	- name: Cancel previous
	uses: styfle/cancel-workflow-action@0.11.0
	with:
	access_token: ${{ github.token }}

	- name: Checkout code
	uses: actions/checkout@v3.2.0
	with:
	fetch-depth: 0
	submodules: true

	- name: Install dependencies
	run:
	sudo apt-get install libssl-dev && pip3 install blifparser

	- name: Read_Verilog_Ubuntu
	if: matrix.mode == 'verilog'
	shell: bash
	run: \|
	cd gatelevel_readers/read_verilog && mkdir build && cd build && cmake .. && make -j
	cd ../tescases/ci_tests
	for d in */ ; do
	[ -L "${d%/}" ] && continue
	echo "${d%/}"
	cd "${d%/}"
	../../../build/read_verilog --vfile "${d%/}".v --out "${d%/}"_v.blif
	python3 ../../../../compare_blif/compare_blif.py "${d%/}".blif "${d%/}"_v.blif ../ \|\| exit
	#rm -rf "${d%/}"_v.blif
	#rm -rf "${d%/}"_ports.json ../report.csv
	cd ..
	done

	- name: Read_EDIF_Ubuntu
	if: matrix.mode == 'edif'
	shell: bash
	run: \|
	cd gatelevel_readers/read_edif && mkdir build && cd build && cmake .. && make -j
	cd ../test/ci_tests
	for d in */ ; do
	[ -L "${d%/}" ] && continue
	echo "${d%/}"
	cd "${d%/}"
	../../../build/read_edif "${d%/}".edn "${d%/}"_e.blif
	python3 ../../../../compare_blif/compare_blif.py "${d%/}".blif "${d%/}"_e.blif ../ \|\| exit
	#rm -rf "${d%/}"_e.blif
	#rm -rf "${d%/}"_ports.json ../report.csv
	cd ..
	done

Provide feedback