Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Spell-check README.markdown #54

Open
wants to merge 336 commits into
base: main-m88k
Choose a base branch
from
Open
Changes from all commits
Commits
Show all changes
336 commits
Select commit Hold shift + click to select a range
d7f6d31
[m88k] Lower load/store of global values.
redstar Jan 10, 2022
2556045
[m88k] Add skeleton of delay slot filler pass.
redstar Jan 10, 2022
a8f919e
[m88k] Fix API change in latest LLVM.
redstar Jan 14, 2022
c2d01f6
[m88k] Legalize and lower G_UBFX and G_SBFX.
redstar Jan 17, 2022
69d85c4
[m88k] Implement more of InstrInfo
redstar Jan 17, 2022
5d8f89b
[m88k] Add branch relaxation infrastructure.
redstar Jan 17, 2022
1cc4785
[m88k] Properly initialize passes.
redstar Jan 20, 2022
b13aef8
[m88k] Fix G_LOAD/G_STORE legalization
redstar Jan 23, 2022
fba4ce3
[m88k] Fix part of constant.ll test case.
redstar Jan 23, 2022
fa3bee7
[m88k] First try at mplementing G_MERGE_VALUES
redstar Jan 24, 2022
e9e4c5d
[m88k] Rework register bank info.
redstar Jan 26, 2022
8844a2d
[m88k] Implement InstrInfo::isCopyInstrImpl
redstar Jan 27, 2022
18f6764
[m88k] Implement InstrInfo::getNoop and ::insertNoop
redstar Jan 27, 2022
e8ae22d
[m88k] Implement branch analysis.
redstar Jan 29, 2022
c03b982
[m88k] Simplify RegisterBankInfo
redstar Jan 29, 2022
c0e6779
[m88k] Add pettern for add and sub.
redstar Jan 29, 2022
8617431
[m88k] Fix prologue.
redstar Jan 29, 2022
50a8e7d
[m88k] Exclude generic instructions from branch analyzis
redstar Jan 30, 2022
f0d9bad
[m88k] Fix prologue generation again.
redstar Jan 30, 2022
16da4cd
[m88k] Instruction select for G_GLOBAL_VALUE
redstar Feb 2, 2022
c23a923
[m88k] Fix bug in ELFYAML
redstar Feb 4, 2022
4a7cc27
[m88k] Fix reverseBranchCondition()
redstar Feb 5, 2022
3288d8d
[m88k] Fix offset for fixups.
redstar Feb 5, 2022
e078307
Update README.markdown
redstar Feb 5, 2022
209f0c1
[m88k] Remove old code for LLVM 12
redstar Feb 5, 2022
748c9de
[m88k] Add required getPointerRegClass() function
redstar Feb 8, 2022
5df2382
[m88k] Fix compile errors caused by removed includes.
redstar Feb 11, 2022
27c9ee9
[m88k] Fix another include error.
redstar Feb 12, 2022
962e334
[m88k] Fix signature of createM88kMCCodeEmitter()
redstar Feb 17, 2022
196a873
[m88k] Generate lookup table for isns with delay slot
redstar Feb 17, 2022
16d7e3d
[m88k] Implement delay slot filler.
redstar Feb 19, 2022
00446b4
[m88k] Fix compile errors.
redstar Mar 17, 2022
1355d5b
[m88k] Fix include in M88kDisassembler.cpp
redstar Jun 1, 2022
ccab1af
[m88k] Fix missing forward declaration.
redstar Jun 3, 2022
9431b7c
[m88k] Enable delay slot filler by default.
redstar Jun 3, 2022
eaa34d3
[m88k] Convert test cases to use opaque pointer syntax
redstar Jun 4, 2022
e695091
[m88k] Add -verify-machineinstrs to test cases
redstar Jun 4, 2022
643a1ed
[m88k] Improve delay slot filler.
redstar Jun 4, 2022
608be5c
[m88k] First try at a scheduling model.
redstar Jun 4, 2022
c56dd38
[m88k] Fix bug in M88kCallLowering.
redstar Jun 4, 2022
a9fc1c0
[m88k] Fixes for register pairs.
redstar Jun 5, 2022
3d36019
[m88k] Implement ISel for MERGE/UNMERGE_VALUES
redstar Jun 5, 2022
76e0f80
[m88k] Fix a couple of warnings.
redstar Jun 8, 2022
82d176b
[m88k] Implement returnaddr/frameaddr intrinsics.
redstar Jun 8, 2022
692de68
[m88k] Fix failing test cases.
redstar Jun 15, 2022
c6aec40
[m88k] Add subtarget feature for procs and cache info
redstar Jun 15, 2022
0ae864d
[m88k] Legalize more FP operations.
redstar Jun 16, 2022
8568b0b
[m88k] Improvement lowering G_AND, G_OR.
redstar Jun 20, 2022
0963418
[m88k] Implement G_SELECT and G_SEXT_INREG.
redstar Jun 20, 2022
e88af64
[m88k] Better support for PHI
redstar Jun 24, 2022
8e1600e
[m88k] Fix compile error in release builds.
redstar Jun 24, 2022
37647fc
[m88k] Add test case for dealy slot filler
redstar Jun 24, 2022
e68f420
[m88k] Add empty post-legalizer pass.
redstar Jun 27, 2022
3742df7
[m88k] Legalize & select G_ROTR
redstar Jun 27, 2022
6e87347
[m88k] Support "tune-cpu" attribute.
redstar Jul 2, 2022
85b7dd2
[m88k] Add more patterns for constants
redstar Jul 2, 2022
bdbe7ef
[m88k] Fix some warnings.
redstar Jul 5, 2022
a47e67f
[m88k] More support for floating point constants.
redstar Jul 8, 2022
ebc8b9a
[m88k] Improvements for load/store
redstar Jul 8, 2022
1138f43
[m88k] Add G_PTR_ADD
redstar Jul 8, 2022
d3c38bb
[m88k] Fix data layout.
redstar Jul 10, 2022
937c6c2
[m88k] Make stack protect work
redstar Jul 10, 2022
798ade3
[m88k] Add R_88K_32 relocation.
redstar Jul 11, 2022
e25286f
[m88k] Handle G_TRUNC to S1
redstar Jul 12, 2022
294044e
[m88k] More flow control
redstar Jul 12, 2022
b0af0c3
[m88k] Add instruction select for G_FRAME_INDEX
redstar Jul 13, 2022
e4d0faa
[m88k] Implement isel for G_FPTOSI and G_SITOFP
redstar Jul 13, 2022
e58c7a4
[m88k] Better legalization/selection for G_ZEXT
redstar Jul 15, 2022
20ca9f4
[m88k] Better floating point support.
redstar Jul 16, 2022
704d386
[m88k] Fix typo in predicate.
redstar Jul 16, 2022
723efe8
[m88k] More integer operations.
redstar Jul 16, 2022
5fa4ed7
[m88k] Add isMC88110() method to M88kSubtarget.
redstar Jul 16, 2022
c84af7c
[m88k] First try at divs/divu instruction.
redstar Jul 18, 2022
ee5e888
[m88k] Add some functions to M88kISelLowering
redstar Jul 18, 2022
207e26b
[m88k] Add new pass to handle signed/unsigned div.
redstar Jul 23, 2022
fb61ab3
[m88k] Move lowering G_SDIV -> G_UDIV into combiner.
redstar Jul 30, 2022
d9d45f1
[m88k] Implement G_CTLZ and G_CTLZ_ZERO_UNDEF
redstar Aug 2, 2022
5df8961
[m88k] Add more flags, including isReMaterializable
redstar Aug 2, 2022
ab700e2
[m88k] Legalize & select G_MUL
redstar Aug 2, 2022
c58fa3e
[m88k] Legalize & select G_UDIV
redstar Aug 2, 2022
26fccef
[m88k] Fixes and test for G_MUL and G_UDIV.
redstar Aug 3, 2022
e2bdebb
[m88k] Fix endian bug affecting double constants
redstar Aug 5, 2022
b5710f6
[m88k] Use REG_SEQUENCE when lowering G_MERGE_VALUES
redstar Aug 5, 2022
ad5cc2b
[m88k] Add patterns for PADD and PSUB.
redstar Aug 9, 2022
a85c7eb
[m88k] Fix warning: getValue() -> value()
redstar Aug 11, 2022
6d64fce
[m88k] Decode ambigous instruction.
redstar Aug 11, 2022
51607be
[m88k] Decode more ambigous instruction.
redstar Aug 12, 2022
1da9feb
[m88k] Add missing lda variants.
redstar Aug 12, 2022
6ec3085
[m88k] Remove unused SDNodes for bitfield instructions
redstar Aug 12, 2022
9d07a4a
[m88k] Snall changes in M88kInstrInfo.td
redstar Aug 12, 2022
858efc7
[m88k] Split bitfield operand into width and offset
redstar Aug 13, 2022
cf9ee67
[m88k] Add pattern to match LDA
redstar Aug 14, 2022
0cd8d45
[m88k] Fix bug in isReMaterializable
redstar Aug 15, 2022
2704466
[m88k] More legalization.
redstar Aug 15, 2022
95405b2
[m88k] Fix problem in M88kMCAsmBackend
redstar Aug 16, 2022
1481b13
[m88k] Mark %r0 and %x0 as constant.
redstar Aug 17, 2022
32f4945
[m88k] Register %r1 is not callee-saved.
redstar Aug 17, 2022
782680b
[m88k] Update README.
redstar Aug 17, 2022
139e259
[m88k] Update cond.ll test case.
redstar Aug 18, 2022
48fed90
[m88k] Bug fixes for the delay slot filler.
redstar Aug 18, 2022
65c712e
[m88k] Rename imm32zx16 -> uimm16
redstar Aug 23, 2022
f4294ce
[m88k] Improve isReMaterializable setting.
redstar Aug 23, 2022
22fabf9
[m88k] Enable further matching of immediates
redstar Aug 23, 2022
cc1ad49
[m88k] Update README.markdown
redstar Aug 24, 2022
613a71a
[m88k] Add support for -m88000 option
redstar Aug 24, 2022
8405f42
[m88k] Fix bug regarding cmp with immediate
redstar Aug 28, 2022
b3b1355
[m88k] Implement G_FREEZE
redstar Aug 28, 2022
347d39a
[m88k] Fix some type definitions in clang
redstar Aug 28, 2022
69c764c
[m88k] Implement special cases for 0 value
redstar Aug 28, 2022
2548c9d
[m88k] Extend the 88100 scheduling model.
redstar Aug 29, 2022
34940db
[m88k] Introduce alias for carry.
redstar Aug 29, 2022
8ac3436
[m88k] Implement add/sub with carry.
redstar Aug 30, 2022
8d944be
[m88k] First steps with new optimization
redstar Sep 2, 2022
a7124d2
[m88k] Improve handling of carry.
redstar Sep 5, 2022
02b6882
[m88k] Add combiner rule for a + (b cmpop c)
redstar Sep 5, 2022
69b514f
[m88k] Add another combine pattern.
redstar Sep 8, 2022
beef51e
[m88k] More combine rules with carry operations.
redstar Sep 9, 2022
8b79d6e
[m88k] Consistently use R0 for zero register value
redstar Sep 10, 2022
32bd966
[m88k] Improve handling of G_SELECT
redstar Sep 10, 2022
363981b
[m88k] Removed dead combiner code.
redstar Sep 18, 2022
0a9bafe
[m88k] Try to use a tree matcher in combiner.
redstar Sep 19, 2022
4d8160f
[m88k] Use tree matcher in post-legalizer combiner
redstar Sep 19, 2022
945ee79
[m88k] Fix compile error due to upstream changes.
redstar Oct 3, 2022
cdebec7
[m88k] Fix error caused by upstream change
redstar Nov 18, 2022
6613531
[m88k] Fix compile error caused by upstream change
redstar Nov 21, 2022
44be3c7
[m88k] Fix compile errors due to upstream changes
redstar Dec 6, 2022
f0ac2c9
[m88k] Fix compile error in combiner
redstar Dec 10, 2022
c2af74a
[m88k] Add more libcalls.
redstar Dec 10, 2022
dbbdfe3
[m88k] Materialize all constants in tablegen
redstar Dec 14, 2022
699b83c
[m88k] Move shifted mask patterns
redstar Dec 15, 2022
7e49a9e
[m88k] Move another pattern to td
redstar Dec 15, 2022
922d7b7
[m88k] Simplify instruction definition.
redstar Dec 15, 2022
54c8b2e
[m88k] Fix errors due to D138656
redstar Dec 17, 2022
eed06d8
[m88k] Fix compile errors due to D140273
redstar Dec 21, 2022
0e36024
[m88k] Add m88k support to update_llc_test_checks.py
redstar Jan 2, 2023
f600f1e
[m88k] Update most tests with script.
redstar Jan 2, 2023
a18422c
[m88k] Fix compile errors due to upstream changes
redstar Jan 13, 2023
9232e3b
[m88k] Fix warning
redstar Jan 14, 2023
8fa8b7c
[m88k] Fix some compile errors.
redstar Jan 28, 2023
08e423b
[m88k] Fix some warnings
redstar May 21, 2023
1c16348
[m88k] Fix error in M88kCombine.td
redstar May 21, 2023
53e862a
[m88k] Fix compile error due to renaming
redstar May 21, 2023
d544902
[m88k] Use new TargetParser
redstar May 21, 2023
b0c31ec
[m88k] Fix various changes in clang
redstar May 21, 2023
93b228a
[m88k] Enhance load and store LIT tests
redstar May 22, 2023
7a70af9
[m88k] Add test case for frame index access
redstar May 22, 2023
28405ca
[m88k] Rework some of the load/store instructions
redstar May 23, 2023
97c55b3
[m88k] Implement complex pattern for addresses
redstar May 23, 2023
dda95af
Update load unsigned
redstar May 23, 2023
0cce8e7
[m88k] Simplify definition of float instructions
redstar May 24, 2023
238e7a8
[m88k] Add new test for branch instructions.
redstar May 25, 2023
c96a940
[m88k] Load/Store now completely pattern based
redstar May 29, 2023
25e0d04
[m88k] Fix compile error
redstar Jun 5, 2023
a2c25d6
[m88k] Add floating point compare patterns
redstar Jun 6, 2023
cbd80f7
[m88k] Extend the scheduling model
redstar Jun 23, 2023
df96734
[m88k] Implement unaligned loads
redstar Jul 1, 2023
a254807
[m88k] Implement unaligned stores
redstar Jul 8, 2023
d932407
[m88k] Fix compile errors due to upstream changes
redstar Jul 15, 2023
b4c5fa4
[m88k] Update GICombiners
redstar Jul 18, 2023
ea31482
[m88k] Move comments in M88kRegisterInfo.td
redstar Oct 10, 2023
27890e1
[m88k] Rename register classes and operands
redstar Oct 10, 2023
5a4fd93
[m88k] Split multiclass M88kRegisterClass
redstar Oct 10, 2023
47c1e9c
[m88k] Simplify F_JMP instruction format
redstar Oct 17, 2023
a8bbb6b
[m88k] Add M88k to list of all experimental targets
redstar Oct 17, 2023
13c2bc3
[m88k] Updates due to upstream changes
redstar Oct 20, 2023
afc92ea
[m88k] More changes from upstream
redstar Oct 20, 2023
680ea6c
[m88k] Migrate Assembler to use ParseStatus
redstar Oct 21, 2023
3a91da7
[m88k] Update M88kMCCodeEmitter
redstar Oct 21, 2023
2728f1d
[m88k] More M88kAsmParser updates
redstar Oct 21, 2023
b307ce1
[m88k] More clang-tidy fixes
redstar Oct 22, 2023
3d9d29f
[m88k] Migrate GI combiners
redstar Oct 22, 2023
81d6d38
[m88k] More clang-tidy updates.
redstar Oct 23, 2023
b875340
[m88k] Wrong register pair for double value
redstar Oct 24, 2023
4c60137
[m88k] Update M88kCallLowering due to upstream changes
redstar Oct 30, 2023
3266ef9
[m88k] Update combiners to fix crash
redstar Oct 31, 2023
4e7eac9
[m88k] Fix type in comment.
redstar Nov 12, 2023
ef5ff41
[m88k] Define callee-saved registers for MC88110
redstar Nov 12, 2023
dc59d2d
[m88k] Remove debug output
redstar Nov 12, 2023
85837c5
[m88k] Change implementation of RET pseudo
redstar Nov 13, 2023
d8f265a
[m88k] Fix isCopyInstrImpl
redstar Nov 17, 2023
0526679
[m88k] Fix warning in clang/../M88k.cpp
redstar Nov 17, 2023
e56c678
[m88k] Fix tpye problem in M88kRegisterbankInfo
redstar Nov 17, 2023
af96b36
[m88k] Some cleanup
redstar Nov 19, 2023
ae7c0c2
[m88k] Extend load/storeRegFromStackSlot
redstar Nov 21, 2023
8317b90
[m88k] Fix warning in clang
redstar Nov 22, 2023
d094f87
[m88k] Fix problem with load
redstar Nov 23, 2023
e939fbd
[m88k] Improve selectAddrRegScaled()
redstar Nov 28, 2023
30e1435
[m88k] Remove code to select load/store
redstar Nov 28, 2023
b083b4c
[m88k] MCAsmBackend::shouldForceRelocation() has new parameter
redstar Dec 9, 2023
8239782
[m88k] Add diagrams to README
redstar Dec 9, 2023
89617d8
[m88k] Rework prolog generation
redstar Dec 12, 2023
5af54d3
[m88k] Add support for large stack frames
redstar Dec 14, 2023
85fb784
[m88k] Add missing patterns for extload.
redstar Dec 27, 2023
18a4894
[m88k] Fix change signature of M88kLegalizerInfo::legalizeCustom
redstar Jan 4, 2024
b43c820
[m88k] Fix crash in prolog generation
redstar Jan 6, 2024
0b732c6
[m88k] Add the Localizer pass
redstar Jan 8, 2024
8b178bc
[m88k] Change register allocation order
redstar Jan 8, 2024
fd415a3
[m88k] Use getMemSize() for scaled addresses
redstar Jan 13, 2024
41cc61b
[m88k] Fix return value of assignCustomValue()
redstar Jan 13, 2024
8d73aae
[m88k] Make sure that pointer constants can be selected
redstar Jan 14, 2024
e81ed6d
[m88k] Snall cleanup in the td files
redstar Jan 14, 2024
8aa10fc
[m88k] Use a pattern for G_FPTOSI
redstar Jan 15, 2024
dbd7ef2
[m88k] Legalize part of G_UITOFP
redstar Jan 16, 2024
fafb1b8
[m88k] Define intrinsic llvm.m88k.ff1/ff0
redstar Jan 22, 2024
a07c8fc
[m88k][clang] Implement ff1 and ff0 as clang intrinsics
redstar Feb 7, 2024
d009641
[m88k] Fix lowering of G_CTLZ
redstar Jan 23, 2024
9c257bc
[m88k] Legalize more bit instructions
redstar Jan 23, 2024
6cbe1e3
[m88k] Remove lowering of G_SELECT
redstar Jan 24, 2024
b8a558a
[m88k] Updates to immediate materialization
redstar Jan 25, 2024
696c340
[m88k] Fix includes.
redstar Jan 27, 2024
542ae46
[m88k] Optimize FFS
redstar Jan 28, 2024
7a101ac
[m88k] Legalize G_UMULH, G_SMULH
redstar Feb 1, 2024
b08460c
[m88k] Introduce instructions for div/divs and mul/mulu
redstar Feb 2, 2024
8506ebd
[m88k] Apply upstream change
redstar Feb 3, 2024
a057e66
[m88k] Recognize alternative register names
redstar Feb 4, 2024
f57a13e
[m88k] Update README
redstar Feb 4, 2024
e5f7534
[m88k] Add mayRaiseFPException to all FP instructions
redstar Feb 4, 2024
2e7f9bc
[m88k] Add motorola-sysv4 to triple
redstar Feb 9, 2024
ea1443f
[m88k] Add options to disable passes
redstar Feb 10, 2024
cee6b21
[m88k] Disable intdiv_combines and mulh_combines
redstar Feb 10, 2024
e91a236
[m88k] Lower ext of carry
redstar Jan 30, 2024
ac2aff8
[m88k] Re-implement overflow handling
redstar Feb 7, 2024
d67217f
[m88k] Update test call-return.ll
redstar Feb 14, 2024
657158c
[m88k] clang support for triple
redstar Feb 9, 2024
503621e
[m88k] Change register class for register pairs
redstar Feb 21, 2024
b6df855
[m88k] Implement register categories.
redstar Feb 21, 2024
71ff946
[m88k] Cache SP register for outgoing arguments
redstar Feb 21, 2024
690ba1b
[m88k] ABI fixes
redstar Feb 24, 2024
ba241f4
[m88k] Implement G_VASTART
redstar Feb 26, 2024
a4ab7fd
[m88k] Generalize mapping of intrinsics
redstar Mar 1, 2024
bc88518
[m88k] Enable constant folding of ff0 and ff1
redstar Mar 6, 2024
25df69b
[m88k] Rework RegisterBankInfo
redstar Mar 9, 2024
ecddf77
[m88k] Implement G_PTRMASK.
redstar Mar 13, 2024
a741591
[m88k][clang] Implement va_next
redstar Feb 28, 2024
8055e8d
[m88k] Update instruction selector
redstar Mar 14, 2024
7a22caf
[m88k] Enable selection of G_PTRADD
redstar Mar 14, 2024
bb156ff
[m88k] Fix compile erors due to upstream changes
redstar Mar 18, 2024
d97f87b
[m88k] Remove unused SDAG patterns
redstar Mar 28, 2024
519da2d
[m88k] Move more code generation to TableGen patterns
redstar Mar 28, 2024
b388dac
[m88k] Fix compile error due to upstream change
redstar Mar 29, 2024
6f31452
[m88k] Remove use of ADJCALLSTACKDOWN/ADJCALLSTACKUP
redstar Mar 29, 2024
4a7d060
[m88k] Some cosmetic cleanups
redstar Mar 30, 2024
627c0e2
[m88k] Fix extending loads
redstar Mar 30, 2024
21cd060
[m88k][clang] Implement ABI
redstar Apr 1, 2024
cba0f33
[Experimental] Create a BURS-style instruction selector
redstar Mar 22, 2024
116d91b
[m88k] Replace ComplexPattern with PatFrag
redstar Apr 12, 2024
75886ce
[m88k] Handle G_FRAME_INDEX in .td file
redstar Apr 25, 2024
7d1430a
[m88k] Remove G_LO and G_HI
redstar May 1, 2024
48778ce
[m88k] Remove patterns for mov instruction
redstar May 1, 2024
15aae78
Spell-check README.markdown
FlashSheridan May 10, 2024
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
202 changes: 202 additions & 0 deletions README.markdown
Original file line number Diff line number Diff line change
@@ -0,0 +1,202 @@
# The LLVM m88k backend implementation

This repository contains the current state of my **m88k backend for LLVM**.
For general information about LLVM, please read [README.md](README.md).

The Motorola 88000 is a RISC architecture developed by Motorola in the late
1980s. See [Wikipedia](https://en.wikipedia.org/wiki/Motorola_88000) for a
general overview.

The code is based on the example from my book "Learn LLVM 12" (see
[O'Reilly](https://learning.oreilly.com/library/view/learn-llvm-12/9781839213502/),
[Packt](https://www.packtpub.com/product/learn-llvm-12/9781839213502) or
[Amazon](https://www.amazon.com/Learn-LLVM-12-beginners-libraries/dp/1839213507/)).
It differs in the following ways:
- Uses only GlobalISel. SelectionDAG support has been removed.
- Minimal clang support. Makes it easy to crash the backend.
- All machine instructions are implemented.
- Assembler supports `.requires81100` directive.
- Updates/refactoring of AsmParser, register definition, calling convention, etc.
- Removed all Itineraries in favor of the new scheduling model.

## Building LLVM with the m88k backend

The m88k backend is added as experimental backend to LLVM, named `M88k`.
It's defined in the CMake files, but if you want to compile other experimental
targets, too, then you have to pass option

```-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="M88k"```

to CMake.

## Development

The main development happens in branch `main-m88k`. The branch
`release/13.x-m88k` contains an older state based on LLVM 13.x. The branch
`release/12.x-m88k` contains the source from my
[book](https://www.packtpub.com/product/learn-llvm-12/9781839213502) on top of
LLVM 12.x.

This repository mirrors the LLVM `main` and `release/*` branches. I keep my
files on top of `main`, which means that I often rebase. Sorry!

## Status

The benchmark [MiBench/security-sha](https://github.com/llvm/llvm-test-suite/tree/main/MultiSource/Benchmarks/MiBench/security-sha)
from the [LLVM test suite](https://github.com/llvm/llvm-test-suite/) can be
cross-compiled with optimization levels -O0, -O1, and -O2, and gives the same
result as the native gcc-compiled version. Here is the recipe:

1. Create a directory for the header files. From here I name it `$SYSROOT`.
2. Copy directory `/usr/include` (with all subdirectories) from your OpenBSD system
to your development system into the directory `$SYSROOT/usr/include`.
3. Change into the LLVM test suite into directory `MultiSource/Benchmarks/MiBench/security-sha`,
and compile the test case:
`clang -target m88k-openbsd --sysroot=$SYSROOT -c sha*.c`
4. Copy the object files back to your OpenBSD system.
5. Link the object files:
`gcc -o sha sha*.o`
6. Run the test case, e.g. `./sha /etc/rc`
7. To verify the result you can copy the test case source to your OpenBSD system,
compile the files with gcc, run the program on the same file and compare the
result.

Other test cases and optimization levels may work but there is still a lot to
implement before significant more test cases function correctly.

## Support

If you like this work, then there are several ways you can support me:

- You can contributes patches.
- You can provide access to real hardware, e.g. as ssh login.
- If you find some documentation (e.g. the ABI updates from 88open) I would be
happy to receive a copy.
- You can buy me a beer or a coffee.

## General information about m88k

### Programming manuals

You can find the user manuals for the 88100 and 88110 CPUs, the 88200 MMU and the
88410 secondary cache controller at bitsavers:
http://www.bitsavers.org/components/motorola/88000/. The manual for the 88110
CPU and the 88410 cache controller are also available on GitHub:
https://github.com/awesome-cpus/awesome-cpus-m88k. Some of the files can also be
found on https://archive.org/.

The ELF ABI is only available at
https://archive.org/details/bitsavers_attunixSysa0138776555SystemVRelease488000ABI1990_8011463.

The book [Programming the Motorola 88000](https://www.amazon.com/Programming-Motorola-88000-Michael-Tucker/dp/0830635335/)
by Michael Tucker and Bruce Coorpender (ISBN-13: 978-0830635337,
ISBN-10: 0830635335) is out of print.

In the book [Microprocessor Architectures, 2nd Edition](https://www.oreilly.com/library/view/microprocessor-architectures-2nd/9781483295534/)
by Steve Heath, you find a description of the M88000 architecture in chapter 3.

Regarding the ABI, there were some changes made by the 88open consortium. I have
not yet found that documents. If you have some of them then please contact me!

### Systems

The [OpenBSD/luna88k](https://www.openbsd.org/luna88k.html) port is still active
and provides the latest OS releases.
On a Linux or FreeBSD machine, you can use [GXemul](http://gavare.se/gxemul/) to
run OpenBSD/luna88k. Alternatively you can use the
[LUNA emulator nono](http://www.pastel-flower.jp/~isaki/nono/).
Kenji Aoyama provides a [live image](http://www.nk-home.net/~aoyama/liveimage/)
which can be used with both emulators.

You can find information about real hardware at [m88k.com](http://m88k.com/).

### Toolchain

gcc 3.3.6 is last version with support for the m88k architecture. See the manual
page at
https://gcc.gnu.org/onlinedocs/gcc-3.3.6/gcc/M88K-Options.html#M88K-Options.

You can download that version from
ftp://ftp.nluug.nl/mirror/languages/gcc/releases/gcc-3.3.6/gcc-3.3.6.tar.gz

binutils 2.16 is last version with support for the m88k architecture. See the
manual page at
https://sourceware.org/binutils/docs-2.16/

You can download that version from
http://ftp.gnu.org/gnu/binutils/binutils-2.16.1a.tar.bz2, and browse the source at
https://sourceware.org/git/?p=binutils-gdb.git;a=tree;h=a7e286b9ab6d33e8261bfadc992d5bf753b36e9f;hb=a783ed1a1ba08d73583da5a56470e4af5acfb6bd.

### Implementation

The backend is implementated like all other LLVM backends. The main classes
involved are:

```mermaid
classDiagram
TargetPassConfig <|-- M88kPassConfig
M88kPassConfig .. M88kTargetMachine
LLVMTargetMachine <|-- M88kTargetMachine
TargetLowering <|-- M88kTargetLowering
TargetLoweringObjectFileELF .. M88kTargetMachine
M88kGenSubtargetInfo <|-- M88kSubtarget
M88kGenInstrInfo <|-- M88kInstrInfo
M88kGenRegisterInfo <|-- M88kRegisterInfo
M88kTargetMachine --> M88kSubtarget
M88kSubtarget o-- M88kInstrInfo
M88kSubtarget o-- M88kTargetLowering
M88kInstrInfo o-- M88kRegisterInfo
class M88kTargetMachine{
+getSubtargetImpl() M88kSubtarget
+createPassConfig() TargetPassConfig
+getObjFileLowering() TargetLoweringObjectFile
}
class M88kSubtarget{
-M88kFrameLowering FrameLowering
-M88kInstrInfo InstrInfo
+getTargetLowering() M88kTargetLowering
+getInstrInfo() M88kInstrInfo
}
class M88kInstrInfo{
-M88kRegisterInfo RI
+getRegisterInfo() M88kRegisterInfo
}
class M88kGenSubtargetInfo{
<<Generated>>
}
class M88kGenInstrInfo{
<<Generated>>
}
class M88kGenRegisterInfo{
<<Generated>>
}
```

The `M88kSubtarget` also owns the main passes for GlobalISel:

```mermaid
classDiagram
M88kSubtarget o-- M88kCallLowering
M88kSubtarget o-- M88kM88kLegalizerInfo
M88kSubtarget o-- M88kRegisterBankInfo
M88kSubtarget o-- M88kInstructionSelector
M88kGenSubtargetInfo <|-- M88kSubtarget
class M88kSubtarget{
-std::unique_ptr~CallLowering~ CallLoweringInfo
-std::unique_ptr~LegalizerInfo~ Legalizer
-std::unique_ptr~RegisterBankInfo~ RegBankInfo
-std::unique_ptr~InstructionSelector~ InstSelector
+getCallLowering() CallLowering
+getRegBankInfo() RegisterBankInfo
+getLegalizerInfo() LegalizerInfo
+getInstructionSelector() InstructionSelector
}
class M88kCallLowering{
}
class M88kM88kLegalizerInfo{
}
class M88kRegisterBankInfo{
}
class M88kInstructionSelector{
}
```
1 change: 1 addition & 0 deletions clang/include/clang/Basic/Attr.td
Original file line number Diff line number Diff line change
@@ -448,6 +448,7 @@ def TargetMips32 : TargetArch<["mips", "mipsel"]>;
def TargetAnyMips : TargetArch<["mips", "mipsel", "mips64", "mips64el"]>;
def TargetMSP430 : TargetArch<["msp430"]>;
def TargetM68k : TargetArch<["m68k"]>;
def TargetM88k : TargetArch<["m88k"]>;
def TargetRISCV : TargetArch<["riscv32", "riscv64"]>;
def TargetX86 : TargetArch<["x86"]>;
def TargetAnyX86 : TargetArch<["x86", "x86_64"]>;
21 changes: 21 additions & 0 deletions clang/include/clang/Basic/BuiltinsM88k.td
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
//===--- BuiltinsM88k.td - M88k Builtin function database ----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

include "clang/Basic/BuiltinsBase.td"

def FindFirstSet : Builtin {
let Spellings = ["__builtin_m88k_ff1"];
let Attributes = [NoThrow, Const];
let Prototype = "int(unsigned int)";
}

def FindFirstClear : Builtin {
let Spellings = ["__builtin_m88k_ff0"];
let Attributes = [NoThrow, Const];
let Prototype = "int(unsigned int)";
}
4 changes: 4 additions & 0 deletions clang/include/clang/Basic/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -60,6 +60,10 @@ clang_tablegen(BuiltinsRISCV.inc -gen-clang-builtins
SOURCE BuiltinsRISCV.td
TARGET ClangBuiltinsRISCV)

clang_tablegen(BuiltinsM88k.inc -gen-clang-builtins
SOURCE BuiltinsM88k.td
TARGET ClangBuiltinsM88k)

# ARM NEON and MVE
clang_tablegen(arm_neon.inc -gen-arm-neon-sema
SOURCE arm_neon.td
10 changes: 10 additions & 0 deletions clang/include/clang/Basic/TargetBuiltins.h
Original file line number Diff line number Diff line change
@@ -89,6 +89,16 @@ namespace clang {
};
}

/// M88k builtins
namespace M88k {
enum {
LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
#include "clang/Basic/BuiltinsM88k.inc"
LastTSBuiltin
};
}

/// PPC builtins
namespace PPC {
enum {
9 changes: 8 additions & 1 deletion clang/include/clang/Basic/TargetInfo.h
Original file line number Diff line number Diff line change
@@ -355,7 +355,14 @@ class TargetInfo : public TransferrableTargetInfo,
// void *__saved_reg_area_end_pointer;
// void *__overflow_area_pointer;
//} va_list;
HexagonBuiltinVaList
HexagonBuiltinVaList,

// typedef struct __va_list_tag {
// int __va_arg;
// int *__va_stk;
// int *__va_reg;
//} va_list;
M88kBuiltinVaList
};

protected:
13 changes: 13 additions & 0 deletions clang/include/clang/Driver/Options.td
Original file line number Diff line number Diff line change
@@ -215,6 +215,8 @@ def m_hexagon_Features_HVX_Group : OptionGroup<"<hexagon features group>">,
Group<m_Group>, DocName<"Hexagon">;
def m_m68k_Features_Group: OptionGroup<"<m68k features group>">,
Group<m_Group>, DocName<"M68k">;
def m_m88k_Features_Group: OptionGroup<"<m88k features group>">,
Group<m_Group>, DocName<"M88k">;
def m_mips_Features_Group : OptionGroup<"<mips features group>">,
Group<m_Group>, DocName<"MIPS">;
def m_ppc_Features_Group : OptionGroup<"<ppc features group>">,
@@ -6021,6 +6023,17 @@ foreach i = {0-7} in
HelpText<"Reserve the d"#i#" register (M68k only)">;
} // let Flags = [TargetSpecific]

// M88k features flags
def m88000 : Flag<["-"], "m88000">, Group<m_m88k_Features_Group>;
def m88100 : Flag<["-"], "m88100">, Group<m_m88k_Features_Group>;
def m88110 : Flag<["-"], "m88110">, Group<m_m88k_Features_Group>;
// TODO This flag is already in the MIPS group.
//def mcheck_zero_division : Flag<["-"], "mcheck-zero-division">, Group<m_m88k_Features_Group>;
//def mno_check_zero_division : Flag<["-"], "mno-check-zero-division">, Group<m_m88k_Features_Group>;
def muse_div_instruction : Flag<["-"], "muse-div-instruction">,
Group<m_m88k_Features_Group>,
HelpText<"Use div instruction for signed integer division (MC88100 only)">;

// X86 feature flags
let Flags = [TargetSpecific] in {
def mx87 : Flag<["-"], "mx87">, Group<m_x86_Features_Group>;
43 changes: 43 additions & 0 deletions clang/lib/AST/ASTContext.cpp
Original file line number Diff line number Diff line change
@@ -9192,6 +9192,47 @@ static TypedefDecl *CreateHexagonBuiltinVaListDecl(const ASTContext *Context) {
return Context->buildImplicitTypedef(VaListTagArrayType, "__builtin_va_list");
}

static TypedefDecl *CreateM88kBuiltinVaListDecl(const ASTContext *Context) {
// typedef struct __va_list_tag {
RecordDecl *VaListTagDecl;
VaListTagDecl = Context->buildImplicitRecord("__va_list_tag");
VaListTagDecl->startDefinition();

const size_t NumFields = 3;
QualType FieldTypes[NumFields];
const char *FieldNames[NumFields];

// int __va_arg;
FieldTypes[0] = Context->IntTy;
FieldNames[0] = "__va_arg";

// int *__va_stk;
FieldTypes[1] = Context->getPointerType(Context->IntTy);
FieldNames[1] = "__va_stk";

// int *__va_reg;
FieldTypes[2] = Context->getPointerType(Context->IntTy);
FieldNames[2] = "__va_reg";

// Create fields
for (unsigned i = 0; i < NumFields; ++i) {
FieldDecl *Field = FieldDecl::Create(
const_cast<ASTContext &>(*Context), VaListTagDecl, SourceLocation(),
SourceLocation(), &Context->Idents.get(FieldNames[i]), FieldTypes[i],
/*TInfo=*/0,
/*BitWidth=*/0,
/*Mutable=*/false, ICIS_NoInit);
Field->setAccess(AS_public);
VaListTagDecl->addDecl(Field);
}
VaListTagDecl->completeDefinition();
Context->VaListTagDecl = VaListTagDecl;
QualType VaListTagType = Context->getRecordType(VaListTagDecl);

// } __builtin_va_list;
return Context->buildImplicitTypedef(VaListTagType, "__builtin_va_list");
}

static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
TargetInfo::BuiltinVaListKind Kind) {
switch (Kind) {
@@ -9213,6 +9254,8 @@ static TypedefDecl *CreateVaListDecl(const ASTContext *Context,
return CreateSystemZBuiltinVaListDecl(Context);
case TargetInfo::HexagonBuiltinVaList:
return CreateHexagonBuiltinVaListDecl(Context);
case TargetInfo::M88kBuiltinVaList:
return CreateM88kBuiltinVaListDecl(Context);
}

llvm_unreachable("Unhandled __builtin_va_list type kind");
1 change: 1 addition & 0 deletions clang/lib/Basic/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -104,6 +104,7 @@ add_clang_library(clangBasic
Targets/Le64.cpp
Targets/LoongArch.cpp
Targets/M68k.cpp
Targets/M88k.cpp
Targets/MSP430.cpp
Targets/Mips.cpp
Targets/NVPTX.cpp
11 changes: 11 additions & 0 deletions clang/lib/Basic/Targets.cpp
Original file line number Diff line number Diff line change
@@ -26,6 +26,7 @@
#include "Targets/Le64.h"
#include "Targets/LoongArch.h"
#include "Targets/M68k.h"
#include "Targets/M88k.h"
#include "Targets/MSP430.h"
#include "Targets/Mips.h"
#include "Targets/NVPTX.h"
@@ -344,6 +345,16 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<M68kTargetInfo>(Triple, Opts);
}

case llvm::Triple::m88k:
switch (os) {
case llvm::Triple::OpenBSD:
return std::make_unique<OpenBSDTargetInfo<M88kTargetInfo>>(Triple, Opts);
case llvm::Triple::SYSV4:
return std::make_unique<SYSVTargetInfo<M88kTargetInfo>>(Triple, Opts);
default:
return std::make_unique<M88kTargetInfo>(Triple, Opts);
}

case llvm::Triple::le32:
switch (os) {
case llvm::Triple::NaCl:
Loading