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Issues: riscv-non-isa/riscv-arch-test
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Error: illegal operands when trying to running floating-point testscase when using TEST_FPSR_OP
#498
opened Sep 29, 2024 by
Pagerd
ACT should remove explicit RVMODEL_HALT and instead add it to the end of RVTEST_CODE_END
#477
opened Jul 1, 2024 by
allenjbaum
ACT should pick different Canary to be the identifier for the end of each test case
#475
opened Jun 17, 2024 by
jamesbeyond
Error in CTG commands for generating floating point riscv-tests
#459
opened Apr 24, 2024 by
Shreesh-Kulkarni
Regnerated MUL* tests missing Zmmul string in RVTEST_ISA macro
#457
opened Apr 23, 2024 by
allenjbaum
RVTEST_CODE_END use of RVTEST_SAVE_GPRS in env/arch_test.h doesn't work
#450
opened Apr 3, 2024 by
ssecatch-w
Extra spaces at the end of a multiline macro causing compile warnings for env/test_macros.h
#449
opened Apr 3, 2024 by
ssecatch-w
misalign-jal-01.S without support for compressed instruction signature mismatch
#445
opened Mar 17, 2024 by
ArbnorSh
Atomic Test cases for amominu (and potentially others) Sail is not generating the correect signature
#430
opened Jan 23, 2024 by
InspireSemi
Continued missing coverage for x0/non-x0 on registers (when all registers are the same)
#429
opened Jan 16, 2024 by
ssecatch-w
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