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This repository has been archived by the owner on Apr 13, 2019. It is now read-only.
Hi !
The misa register correctly provides the value of MXL, but the mstatus/sstatus register do not provide a valid value for the SXL and UXL bits (which are always returned as 0). For example, the documentation states that:
For RV64 and RV128 systems, if S-mode is not supported, then SXL is hardwired to zero. Other-
wise, it is a WARL field that encodes the current value of S-XLEN. In particular, the implemen-
tation may hardwire SXL so that S-XLEN = M-XLEN.
In the case of the sifive_u machine, where Supervisor mode is implemented, 0 is incorrect. Hard-wiring it MXL seems a good option to have a legal value for the time being.
The text was updated successfully, but these errors were encountered:
Some test cases require specific formats. The method decorator
skip_if_unsupported() checks if requested formats are whitelisted.
The test riscvarchive#139 was selected for a sample output, after running
$ ./check -qcow2 131-140
137 3s ...
138 0s ...
139 2s ...
[case not run] testBlkDebug (__main__.TestBlockdevDel): formats ['blkdebug'] are not whitelisted
[case not run] testBlkVerify (__main__.TestBlockdevDel): formats ['blkverify'] are not whitelisted
[case not run] testQuorum (__main__.TestBlockdevDel): formats ['quorum'] are not whitelisted
140 0s ...
Not run: 131 135 136
Some cases not run in: 139
Passed all 7 tests
Signed-off-by: Andrey Shinkevich <andrey.shinkevich@virtuozzo.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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Hi !
The
misa
register correctly provides the value ofMXL
, but themstatus/sstatus
register do not provide a valid value for theSXL
andUXL
bits (which are always returned as 0). For example, the documentation states that:In the case of the
sifive_u
machine, where Supervisor mode is implemented,0
is incorrect. Hard-wiring itMXL
seems a good option to have a legal value for the time being.The text was updated successfully, but these errors were encountered: