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rustc_target: RISC-V: add base I-related important extensions #138823

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@a4lg a4lg commented Mar 22, 2025

Of RISC-V features defined in stdarch, this commit adds ratified extensions satisfying following criteria:

  • Formerly a part of the I extension and splitted thereafter (now ratified as I + Zifencei + Zicsr + Zicntr + Zihpm) or
  • Dicoverable from newer versions of the Linux kernel (Zihintpause) and
  • Available on LLVM 18.

This is based on the latest ratified ISA Manuals (version 20240411).

LLVM Definitions:

Additional (1):
One of those, Zicsr, is a dependency of many other ISA extensions and this commit adds correct dependencies to Zicsr except V (due to ongoing PR #138742).

Additional (2):
In RISC-V, G is an abbreviation of following extensions:

  • I
  • M
  • A
  • F
  • D
  • Zicsr (although implied by F)
  • Zifencei

and all targets with either "riscv32gc" or "riscv64gc" are updated accordingly.


This is the version 3.
Ztso in the original proposal is removed on the PR version 2 due to the minimum LLVM version (non-experimental Ztso requires LLVM 19 while minimum LLVM version of Rust is 18). This is not back in PR version 3 after noticing adding Ztso is possible by checking host LLVM version because PR version 3 introduces compiler target changes (and adding more extensions would complicate the problems; sorry Zihintpause).

Related:

NOT Related but linked:

@rustbot r? @Amanieu
@rustbot label +T-compiler +O-riscv +A-target-feature

@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. O-riscv Target: RISC-V architecture labels Mar 22, 2025
@a4lg a4lg force-pushed the riscv-feature-addition-base-i branch from 1649e52 to e04fb06 Compare March 24, 2025 02:30
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rustbot commented Mar 24, 2025

These commits modify compiler targets.
(See the Target Tier Policy.)

@a4lg a4lg changed the title rustc_target: Sync with stdarch (important parts) rustc_target: RISC-V: add base I-related important extensions Mar 24, 2025
Of RISC-V features defined in stdarch, this commit adds extensions
satisfying following criteria:

*   Formerly a part of the "I" extension and splitted thereafter
    (now ratified as "I" + "Zifencei" + "Zicsr" + "Zicntr" + "Zihpm") or
*   Dicoverable from newer versions of the Linux kernel ("Zihintpause").

This is based on the latest ratified ISA Manuals (version 20240411).

Additional (1):

One of those, "Zicsr", is a dependency of many other ISA extensions and
this commit adds correct dependencies to "Zicsr" except "V"
(due to an ongoing PR).

Additional (2):

In RISC-V, "G" is an abbreviation of following extensions:

*   "I"
*   "M"
*   "A"
*   "F"
*   "D"
*   "Zicsr" (although implied by "F")
*   "Zifencei"

and all targets with either "riscv32gc" or "riscv64gc" are updated
accordingly.
@a4lg a4lg force-pushed the riscv-feature-addition-base-i branch from e04fb06 to b87155b Compare March 24, 2025 02:41
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taiki-e commented Mar 25, 2025

and all targets with either "riscv32gc" or "riscv64gc" are updated accordingly.

I think the following two that do not include extension names in the target name are also actually riscv64gc.

features: "+m,+a,+f,+d,+c,+zba,+zbb,+zbs,+v".into(),

features: "+m,+a,+f,+d,+c".into(),

@Amanieu
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Amanieu commented Mar 28, 2025

@a4lg Could you update the 2 targets mentioned by @taiki-e. Then this should be good to merge.

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A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. O-riscv Target: RISC-V architecture S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
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4 participants