RISC Developments High Density Floppy Controller

Register description

IOC Address map :
  0000-1fff - ROM
  2000-2fff - IRQ status (read)
    bit 2 - index IRQ
    bit 3 - FDC IRQ
            - DMA byte counter low (write)
  3000-3fff - clear index IRQ (read)
            - DMA byte counter high (write)

MEMC Address map :
  0000-1fff - FDC
  2000-2fff - DMA read/write (address 2ffc used)

Basic design

Uses NatSemi DP8473 FDC used in DMA mode. Each DMA request will trigger an FIQ. Each access to the DMA read/write register will cause the DMA byte counter to decrement, and when decremented to zero will cause TC to be asserted, terminating the read/write operation.