Add QSPI mode and update spi driver. #171
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reclusejack
requested review from
palmer-dabbelt,
bsousi5 and
nategraff-sifive
metal/spi.h
Outdated
| /*! @brief The spi dummy frame number */ | ||
| unsigned int dummy_num; | ||
| /*! @brief The Dual/Quad spi mode selection.*/ | ||
| enum { QSPI_ALL, QSPI_DATA_ONLY, QSPI_ADDR_DATA } qspi_mode; |
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If this applies to both dual and quad-SPI, we should probably not name it "qspi_mode".
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Any suggestion for this variable name? How about "multi_wire" or "multi_wire_mode"?
src/drivers/sifive_spi0.c
Outdated
| long control_base = | ||
| __metal_driver_sifive_spi0_control_base((struct metal_spi *)spi); | ||
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| if (config->qspi_mode == qspi_mode) { |
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Why is this check here? If they have to be equal, why not just use the one already in config?
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That' my mistake, I should not use the same name for the two variables.
I've renamed these two variables.
First one is used for SPI configuration, the second is for tagging the data transfer stage.
The function spi_mode_switch will be active either after sending out cmd or before sending data.
MULTI_WIRE_ALL
_ _
CS |______________________________________________________|
_ _ _ _ _ _ _ _ _ _ _ _ _ _
SCL _| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_
Phase ---cmd--|-addr--|-dummy-|-data----------------------------
DQ0 0 4 | 0 4 | 0 4 | 0 4 8 12...
| | |
DQ1 1 5 | 1 5 | 1 5 | 1 5 9 13...
| | |
DQ2 2 6 | 2 6 | 2 6 | 2 6 10 14...
| | |
DQ3 3 7 | 3 7 | 3 7 | 3 7 11 15...
MULTI_WIRE_ADDR_DATA
_ _
CS |______________________________________________________|
_ _ _ _ _ _ _ _ _ _ _ _ _ _
SCL _| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_
Phase ------cmd------|-addr--|-dummy-|-data--------------------
DQ0 0 1 2 3 | 0 4 | 0 4 | 0 4 8 12...
| | |
DQ1 | 1 5 | 1 5 | 1 5 9 13...
| | |
DQ2 | 2 6 | 2 6 | 2 6 10 14...
| | |
DQ3 | 3 7 | 3 7 | 3 7 11 15...
MULTI_WIRE_DATA_ONLY
_ _
CS |______________________________________________________|
_ _ _ _ _ _ _ _ _ _ _ _ _ _
SCL _| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_
Phase ------cmd------|------addr-----|-----dummy-----|-data----
DQ0 0 1 2 3 | 0 1 2 3 | 0 1 2 3 | 0 4
| | |
DQ1 | | | 1 5
| | |
DQ2 | | | 2 6
| | |
DQ3 | | | 3 7
|
@reclusejack Can you issue a similar PR against v201908-branch? @dbarbi1 would like this in v19.08 as well. |
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QSPI_ALL
_ _
CS |_________________________________________|
_ _ _ _ _ _ _ _ _ _ _ _ _ _
SCL | || || || || || || || || || || || || || |
Phase ---cmd--|-addr--|-dummy-|-data----------------------------
DQ0 0 4 | 0 4 | 0 4 | 0 4 8 12...
| | |
DQ1 1 5 | 1 5 | 1 5 | 1 5 9 13...
| | |
DQ2 2 6 | 2 6 | 2 6 | 2 6 10 14...
| | |
DQ3 3 7 | 3 7 | 3 7 | 3 7 11 15...
QSPI_ADDR_DATA
_ _
CS |_________________________________________|
_ _ _ _ _ _ _ _ _ _ _ _ _ _
SCL | || || || || || || || || || || || || || |
Phase ------cmd------|-addr--|-dummy-|-data--------------------
DQ0 0 1 2 3 | 0 4 | 0 4 | 0 4 8 12...
| | |
DQ1 | 1 5 | 1 5 | 1 5 9 13...
| | |
DQ2 | 2 6 | 2 6 | 2 6 10 14...
| | |
DQ3 | 3 7 | 3 7 | 3 7 11 15...
QSPI_DATA_ONLY
_ _
CS |_________________________________________|
_ _ _ _ _ _ _ _ _ _ _ _ _ _
SCL | || || || || || || || || || || || || || |
Phase ------cmd------|------addr-----|-----dummy-----|-data----
DQ0 0 1 2 3 | 0 1 2 3 | 0 1 2 3 | 0 4
| | |
DQ1 | | | 1 5
| | |
DQ2 | | | 2 6
| | |
DQ3 | | | 3 7