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[Arista] Add tuning values for phys on 7280cr3mk #10084

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merged 1 commit into from
Feb 15, 2023

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byu343
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@byu343 byu343 commented Feb 24, 2022

Why I did it

This change specifies the tuning values for each lane of the B52 phy chips. These values can be different for different ports. The values being set are under the assumption of optical transceivers. This change depends on the change to sonic-swss: sonic-net/sonic-swss#2158.

How I did it

How to verify it

We verified the values are correctly set on the B52 chips of Arista 7280cr3, by reading them from the debug cli of the B52 driver.

Which release branch to backport (provide reason below if selected)

  • 201811
  • 201911
  • 202006
  • 202012
  • 202106
  • 202111

Description for the changelog

Link to config_db schema for YANG module changes

A picture of a cute animal (not mandatory but encouraged)

@prgeor prgeor self-assigned this Feb 25, 2022
@byu343 byu343 changed the title [Arista] Add tuning values for phys on 7280cr3 [Arista] Add tuning values for phys on 7280cr3mk Mar 1, 2022
@sujinmkang
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Do we have any dependency between the two prs?

@byu343
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byu343 commented Mar 4, 2022

Do we have any dependency between the two prs?

Yes, the values added here can take effect only after the sonic-swss PR (sonic-net/sonic-swss#2158) is merged.

Comment on lines +241 to +251
"line_lanes": [16,17,18,19],
"system_tx_fir_pre2": [1,1],
"system_tx_fir_pre1": [-5,-5],
"system_tx_fir_main": [14,14],
"system_tx_fir_post1": [0,0],
"system_tx_fir_post2": [0,0],
"line_tx_fir_pre2": [0,0,0,0],
"line_tx_fir_pre1": [-1,-1,-1,-1],
"line_tx_fir_main": [13,13,13,13],
"line_tx_fir_post1": [-5,-5,-5,-5],
"line_tx_fir_post2": [0,0,0,0]
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The line side SI settings may depend upon the type of optics for some platforms. In that case, Xcvrd should read these values based upon the media (see Ref) and publish to gearbox syncd to program the line side on the gearbox. Can we discuss this scheme in the community?

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@prgeor , this gearbox_config.json here is just to provide some initial value like setting tuning values for brcm ASIC in brcm config file. For the dynamic tuning support (based on xcvr type), an idea is to add the support in the future with some extension to the usage of media_settings.json.

@kenneth-arista
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Tagging @arlakshm for awareness

@byu343 byu343 requested a review from a team as a code owner June 10, 2022 02:01
@kenneth-arista
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@arlakshm gentle reminder to merge this change when you get a chance

@arlakshm
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Hi @prgeor, can you help approve and merge this PR

@kenneth-arista
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Another gentle reminder to consider merging. All checks have passed. This PR has been open for nearly 6 months.

@kenneth-arista
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@arlakshm and @prgeor a reminder to review this. Thanks!

jimmyzhai pushed a commit to sonic-net/sonic-swss that referenced this pull request Dec 8, 2022
What I did
This change adds support for setting tx tap or tuning values on gearbox ports. It uses the SAI attributes such as SAI_PORT_SERDES_ATTR_TX_FIR_PRE1 to communicate with SAI-based gearbox drivers. For the values, they are provided in the format like "system_tx_fir_pre2": [1,1] for an interface from gearbox_config.json.

Why I did it

How I verified it
We verified that values provided in sonic-net/sonic-buildimage#10084 are set to the chip with this change.

Added test to tests/test_gearbox.py. The added test will not pass until the following two changes (which should be merged first) are merged:
Support SAI_PORT_ATTR_PORT_SERDES_ID on vs gearbox: sonic-net/sonic-sairedis#1082
Add gearbox taps to vs gearbox_config.json: sonic-net/sonic-buildimage#11480
dgsudharsan pushed a commit to dgsudharsan/sonic-swss that referenced this pull request Dec 9, 2022
What I did
This change adds support for setting tx tap or tuning values on gearbox ports. It uses the SAI attributes such as SAI_PORT_SERDES_ATTR_TX_FIR_PRE1 to communicate with SAI-based gearbox drivers. For the values, they are provided in the format like "system_tx_fir_pre2": [1,1] for an interface from gearbox_config.json.

Why I did it

How I verified it
We verified that values provided in sonic-net/sonic-buildimage#10084 are set to the chip with this change.

Added test to tests/test_gearbox.py. The added test will not pass until the following two changes (which should be merged first) are merged:
Support SAI_PORT_ATTR_PORT_SERDES_ID on vs gearbox: sonic-net/sonic-sairedis#1082
Add gearbox taps to vs gearbox_config.json: sonic-net/sonic-buildimage#11480

Updated handling of VRF_VNI mapping and VLAN_VNI mapping for same VNI ID

fixed compile issues

Updated code for the flow where VRF VNI mapping is processed first followed by VLAN VNI mapping
@byu343
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byu343 commented Jan 3, 2023

@prgeor @sujinmkang The sonic-swss change (sonic-net/sonic-swss#2158) that this change depends on has been merged. Can you please help to review this change again? Thanks.

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prgeor commented Feb 10, 2023

@lguohan please help merge

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lguohan commented Feb 13, 2023

@prgeor , is the swss submodule updated, i see it as a dependency.

@lguohan lguohan merged commit b0e0b23 into sonic-net:master Feb 15, 2023
StormLiangMS pushed a commit to StormLiangMS/sonic-buildimage that referenced this pull request Mar 28, 2023
Related work items: sonic-net#276, sonic-net#305, sonic-net#332, sonic-net#338, sonic-net#339, sonic-net#1188, sonic-net#1192, sonic-net#1197, sonic-net#1206, sonic-net#1685, sonic-net#1690, sonic-net#1696, sonic-net#1699, sonic-net#1709, sonic-net#1727, sonic-net#1737, sonic-net#1741, sonic-net#1742, sonic-net#2511, sonic-net#2512, sonic-net#2532, sonic-net#2559, sonic-net#2626, sonic-net#2638, sonic-net#2645, sonic-net#2649, sonic-net#2660, sonic-net#2669, sonic-net#2670, sonic-net#2678, sonic-net#10084, sonic-net#11442, sonic-net#11873, sonic-net#12047, sonic-net#12110, sonic-net#12207, sonic-net#12529, sonic-net#12678, sonic-net#13235, sonic-net#13287, sonic-net#13372, sonic-net#13395, sonic-net#13456, sonic-net#13497, sonic-net#13522, sonic-net#13545, sonic-net#13547, sonic-net#13552, sonic-net#13569, sonic-net#13572, sonic-net#13578, sonic-net#13591, sonic-net#13611, sonic-net#13647, sonic-net#13649, sonic-net#13660, sonic-net#13710, sonic-net#13716, sonic-net#13724, sonic-net#13726, sonic-net#13732, sonic-net#13735, sonic-net#13739, sonic-net#13757, sonic-net#13786, sonic-net#13792, sonic-net#13800, sonic-net#13801, sonic-net#13802, sonic-net#13805, sonic-net#13806, sonic-net#13812, sonic-net#13814, sonic-net#13822, sonic-net#13831, sonic-net#13834, sonic-net#13847, sonic-net#13870, sonic-net#13882, sonic-net#13884, sonic-net#13885, sonic-net#13894, sonic-net#13895, sonic-net#13926, sonic-net#13932, sonic-net#13935, sonic-net#13942, sonic-net#13951, sonic-net#13953, sonic-net#13964
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6 participants