Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add speed and buffer set test #432

Merged
merged 7 commits into from
Jan 31, 2018
Merged
Changes from 1 commit
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
66 changes: 66 additions & 0 deletions tests/test_speed.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,66 @@
from swsscommon import swsscommon
import time
import re
import json
import os

class TestSpeedSet(object):
num_ports = 32
def test_SpeedAndBufferSet(self, dvs):
speed_list = ['50000', '25000', '40000', '10000', '100000']

cdb = swsscommon.DBConnector(4, dvs.redis_sock, 0)
adb = swsscommon.DBConnector(1, dvs.redis_sock, 0)
cfg_port_table = swsscommon.Table(cdb, "PORT", '|')
cfg_buffer_profile_table = swsscommon.Table(cdb, "BUFFER_PROFILE", '|')
cfg_buffer_pg_table = swsscommon.Table(cdb, "BUFFER_PG", '|')
asic_port_table = swsscommon.Table(adb, "ASIC_STATE:SAI_OBJECT_TYPE_PORT")
asic_profile_table = swsscommon.Table(adb, "ASIC_STATE:SAI_OBJECT_TYPE_BUFFER_PROFILE")

buffer_profiles = cfg_buffer_profile_table.getKeys()
expected_buffer_profiles_num = len(buffer_profiles)
assert expected_buffer_profiles_num == 7
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Using number 7 here seems to be a recipe for long investigation when test fails. How can we make it clearer where this number came from and when test failed here, what to look for?

A comment will be a good start.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

it comes from the buffers profile used for the test
I think it can be calculates (something like cat ... | grep "PROFILE" | wc -l)
I'll check and update this comment

assert len(asic_profile_table.getKeys()) == expected_buffer_profiles_num

for speed in speed_list:
fvs = swsscommon.FieldValuePairs([("speed", speed)])
# set same speed on all ports
for i in range(0, self.num_ports):
cfg_port_table.set("Ethernet%d" % (i*4), fvs)
Copy link
Contributor

@yxieca yxieca Jan 24, 2018

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I suspect this change won't work for all devices.

It all depends on what is self.num_ports?

For instance, Arista7260CX3 has 64 physical ports, if self.num_ports is 64 for this device, then it is fine. However, when Arista7260CX3 is used for T0, it will have 56 out of 64 ports break into 2 50G ports, bring the total number of ports to 112 + 8 = 120. Most of these ports are Etherenet(x * 4) and Ethernet(x * 4 + 2) except the 8 100G ports. So if self.num_ports is 120 for this device, then the code here is incorrect.

Also, it appears that ASIC_STATE:SAI_OBJECT_TYPE_PORT also contains disabled ports. E.g. on the platform mentioned above, the number of entry is actually 123 (120 valid ports, 2 disabled ports, 1 cpu).

On the same mentioned platform, the asic port sequence doesn't directly map into Ethernet sequence. This is another assumption that would break, unfortunately.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It is designed to run on PLATFORM=vs

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I see. Can you at least add a comment at beginning of this file?

Thanks,
Ying


time.sleep(1) # let configuration settle down

# check the speed was set
asic_port_records = asic_port_table.getKeys()
assert len(asic_port_records) == (self.num_ports + 1) # +CPU port
num_set = 0
for k in asic_port_records:
(status, fvs) = asic_port_table.get(k)
assert status == True
for fv in fvs:
if fv[0] == "SAI_PORT_ATTR_SPEED":
assert fv[1] == speed
num_set += 1
# make sure speed is set for all "num_ports" ports
assert num_set == self.num_ports

# check number of created profiles
expected_buffer_profiles_num += 1 # new speed should add new PG profile
current_buffer_profiles = cfg_buffer_profile_table.getKeys()
assert len(current_buffer_profiles) == expected_buffer_profiles_num
# make sure the same number of profiles are created on ASIC
assert len(asic_profile_table.getKeys()) == expected_buffer_profiles_num

# check new profile name
expected_new_profile_name = "pg_lossless_%s_300m_profile" % speed
assert current_buffer_profiles.index(expected_new_profile_name) > -1

# check correct profile is set for all ports
pg_tables = cfg_buffer_pg_table.getKeys()
for i in range(0, self.num_ports):
expected_pg_table = "Ethernet%d|3-4" % (i*4)
assert pg_tables.index(expected_pg_table) > -1
(status, fvs) = cfg_buffer_pg_table.get(expected_pg_table)
for fv in fvs:
if fv[0] == "profile":
assert fv[1] == "[BUFFER_PROFILE|%s]" % expected_new_profile_name