Fix I2C timing. #69
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Fix I2C timing. #69
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The std::max() meant that scll was always set to 255, resulting in bit rates that were far too slow. Also, the documentation states that the clock is divided by PRESC+1, not by 2^(PRESC+1).
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Thanks for the PR. I try to verify it with some G0 board. |
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Verified! |
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While stealing this code for stm32g4xx-hal, I noticed that the I2C timing was WAY off.
The std::max() meant that scll was always set to 255, resulting in bit
rates that were far too slow. Also, the documentation states that the
clock is divided by PRESC+1, not by 2^(PRESC+1).
This code is untested, I do not have any STM32G0xx MCU. I only tested the effects of this patch on a system with an STM32G4xx MCU, where it results in the correct bit rate. AFAICS, the peripherals are identical.