Implement ebreak properly

[Risheng1128]

This commit adds the instruction c.ebreak into rv32emu.

Input the following command, and the c.ebreak test will pass.

make arch-test RISCV_DEVICE=C

[jserv]

Change README.md to reflect the results of RISC-V Architecture Tests.

[jserv]

Check the article How to Write a Git Commit Message to summarize this change.

[Risheng1128]

For the consistent prototype with other exception handlers. I redeclare the rv_except_breakpoint.

- void rv_except_breakpoint(struct riscv_t *rv)
+ static void rv_except_breakpoint(struct riscv_t *rv, uint32_t old_pc)

Add the new function breakpoint_handler and change README.md.

[jserv]

Check privilege item in RISC-V Architecture Tests as well.

[Risheng1128]

privilege instuction test result:

Check ebreak                    ... FAIL 
Check ecall                     ... FAIL 
Check misalign1-jalr-01         ... OK 
Check misalign2-jalr-01         ... OK 
Check misalign-beq-01           ... OK 
Check misalign-bge-01           ... OK 
Check misalign-bgeu-01          ... OK 
Check misalign-blt-01           ... OK 
Check misalign-bltu-01          ... OK 
Check misalign-bne-01           ... OK 
Check misalign-jal-01           ... OK 
Check misalign-lh-01            ... OK 
Check misalign-lhu-01           ... OK 
Check misalign-lw-01            ... FAIL 
Check misalign-sh-01            ... OK 
Check misalign-sw-01            ... FAIL

[jserv]

privilege instruction test result:
Check ebreak ... FAIL
Check ecall ... FAIL

Create a new issue regarding privilege instruction regressions.

[Risheng1128]

Rename the function:

- void breakpoint_handler(struct riscv_t *rv);
+ void ebreak_handler(struct riscv_t *rv);

[jserv]

Thank @Risheng1128 for contributing!