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[TRITON-MLIR] Merge master #995

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merged 19 commits into from
Dec 20, 2022
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@ptillet ptillet commented Dec 20, 2022

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ptillet and others added 19 commits December 19, 2022 12:26
In ```torch._inductor```, we [convert 0d CPU tensor to scalar during
triton codegen](pytorch/pytorch#87329), so need
add missing triton support for bf16/fp16/fp64.
For stupid reasons, ops on int8 are 3 times slower than on int, and for
another set of stupid reasons we are not using cudaMemset for `zero_`,
so using `int8` buffer in `do_bench` makes it slow.

Co-authored-by: Philippe Tillet <phil@openai.com>
….py (#883)

Ran mypy over `build_extern.py`, cleaned up type annotations.

Found a fixed a bug where `ExternLibrary(format=)` was being ignored.
The previous `{i}` was silently expanding to the `i` from the
enumeration loop on `regular_args` (when it wasn't empty).
@ptillet ptillet merged commit 8d496ed into triton-mlir Dec 20, 2022
@ptillet ptillet deleted the phil/triton-mlir-merge-master branch December 20, 2022 01:03
ZzEeKkAa pushed a commit to ZzEeKkAa/triton that referenced this pull request Aug 5, 2024
The pass lowers nvidia_gpu operations, which is not needed for intel
backend.

Signed-off-by: Whitney Tsang <whitney.tsang@intel.com>
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7 participants