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backend: (riscv) riscv-prologue-epilogue-insertion #2778

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bpervan
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@bpervan bpervan commented Jun 25, 2024

Riscv-prologue-epilogue-insertion pass ensures compatibility with RISC-V ABI in terms of preserving the content of callee-saved registers. This brief PR adds the immediate return from the pass in case no callee-saved registers are used by the function, thus preventing the issuing of unnecessary addi sp, sp, 0.

test_get_all_available_passes is changed to adjust the output to the expected one (temporary workaround).

…mmediately if no callee-preserved registers are used; test_get_all_available_passes is changed to adjust the output to the expected one (temporary workaround)
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codecov bot commented Jun 25, 2024

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 89.80%. Comparing base (5405b85) to head (4759b7a).
Report is 3 commits behind head on main.

Additional details and impacted files
@@            Coverage Diff             @@
##             main    #2778      +/-   ##
==========================================
- Coverage   89.80%   89.80%   -0.01%     
==========================================
  Files         376      381       +5     
  Lines       48091    48227     +136     
  Branches     7371     7378       +7     
==========================================
+ Hits        43187    43309     +122     
- Misses       3756     3765       +9     
- Partials     1148     1153       +5     

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bpervan commented Jun 25, 2024

@zero9178 @superlopuh

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Could you also add a test-case to the existing tests in https://github.com/xdslproject/xdsl/blob/ad76f511b94bdfa4d51979d0e41fd52908a61521/tests/filecheck/backend/riscv/prologue_epilogue_insertion.mlir?

A simple function that does not use callee-saved registers + a CHECK-NOT: for the absence of a addi sp, sp should be good enough.

@superlopuh superlopuh added bug Something isn't working backend Compiler backend in xDSL labels Jun 25, 2024
Co-authored-by: Sasha Lopoukhine <superlopuh@gmail.com>
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bpervan commented Jun 26, 2024

Could you also add a test-case to the existing tests in https://github.com/xdslproject/xdsl/blob/ad76f511b94bdfa4d51979d0e41fd52908a61521/tests/filecheck/backend/riscv/prologue_epilogue_insertion.mlir?

A simple function that does not use callee-saved registers + a CHECK-NOT: for the absence of a addi sp, sp should be good enough.

Updated, take a look please

Co-authored-by: Markus Böck <markus.boeck02@gmail.com>
@zero9178 zero9178 merged commit 66b1d91 into xdslproject:main Jun 26, 2024
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@bpervan bpervan deleted the bpervan/riscv-prologue-epilogue-fix branch June 26, 2024 15:46
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3 participants