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backend: add infinite_register class method to RegisterType #3929

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merged 6 commits into from
Feb 24, 2025

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superlopuh
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It's nice to have a check to make sure that our fake infinite registers don't clash with the real ones.

@superlopuh superlopuh added the backend Compiler backend in xDSL label Feb 17, 2025
@superlopuh superlopuh self-assigned this Feb 17, 2025
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codecov bot commented Feb 17, 2025

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 91.30%. Comparing base (e9b1efb) to head (675852e).
Report is 12 commits behind head on main.

Additional details and impacted files
@@            Coverage Diff             @@
##             main    #3929      +/-   ##
==========================================
- Coverage   91.30%   91.30%   -0.01%     
==========================================
  Files         467      468       +1     
  Lines       58068    58121      +53     
  Branches     5581     5582       +1     
==========================================
+ Hits        53021    53067      +46     
- Misses       3616     3623       +7     
  Partials     1431     1431              

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@JosseVanDelm JosseVanDelm left a comment

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Looks good to me, I have a few suggestions though

@@ -146,6 +154,10 @@ def instruction_set_name(cls) -> str:
def abi_index_by_name(cls) -> dict[str, int]:
return SSE_INDEX_BY_NAME

@classmethod
def infinite_register_name(cls, index: int):
return f"sse_{index}"
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Suggested change
return f"sse_{index}"
return f"josse_{index}"

Comment on lines 100 to 103
assert isinstance(res.index, NoneAttr), (
f"Invalid 'infinite' register name {spelling}"
)
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Suggested change
assert isinstance(res.index, NoneAttr), (
f"Invalid 'infinite' register name {spelling}"
)
assert isinstance(res.index, NoneAttr), (
f"Invalid 'infinite' register name: {spelling} clashes with finite register set"
)

@superlopuh
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I changed the logic to just provide the prefix, not the whole thing. One of the questions is do we want _ suffixes everywhere? How important do you think it is to be consistent here, should we allow j0 in riscv and avx2_0 on x86, or should we change to j_0 in riscv land?

@compor
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compor commented Feb 18, 2025

I changed the logic to just provide the prefix, not the whole thing. One of the questions is do we want _ suffixes everywhere? How important do you think it is to be consistent here, should we allow j0 in riscv and avx2_0 on x86, or should we change to j_0 in riscv land?

Not a biggie for me; leaning slightly towards using _ everywhere, since for the RISC-V side is purely a riscemu thing.
Maybe even slightly easier to search/grep?

@superlopuh
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OK then I'll do a quick PR first doing j_ and fj_ for riscv then rebase this on top of that

@superlopuh
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#3934

@superlopuh superlopuh force-pushed the sasha/backend/infinite-register branch from 7db42af to b941802 Compare February 19, 2025 09:21
@superlopuh superlopuh merged commit 403f084 into main Feb 24, 2025
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@superlopuh superlopuh deleted the sasha/backend/infinite-register branch February 24, 2025 10:04
qaco pushed a commit to qaco/xdsl that referenced this pull request Feb 24, 2025
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3 participants