sw_pll raw error monitoring to deem PLL has locked #365
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…ling through rates..
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See #366 as the issue attached. This is a first stab at putting in a proper stability mechanism for sw_pll. |
…sw_pll_sync_ua_err_holdoff # Conflicts: # lib_xua/src/core/buffer/ep/ep_buffer.xc
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Add error based stability. Issue with clockgen/dig rx due to host cycling through rates which do not allow sw_pll to lock when dig Rx is running at a different rate to the selected SR by the host.
Making this PR so we keep visibility of this work on my fork. Feel free to close to tidy up if needed.