ext: hal: cmsis: Add CMSIS-Core(R). #19964
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This commit adds a preliminary implementation of CMSIS-Core(R) for use with the ARM Cortex-R port. At this time, CMSIS-Core(R) is not merged back into the upstream CMSIS repository and therefore is not available from official sources. Until upstream merge happens, the preliminary version can be obtained from the following URL: https://github.com/stephanosio/CMSIS_5/tree/core_r Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add stephanosio as a code owner for /ext/hal/cmsis/. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
stephanosio
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carlescufi
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Oct 19, 2019
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@stephanosio could you please provide the source that you used to populate your https://github.com/stephanosio/CMSIS_5/tree/core_r repository? |
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@carlescufi This is my own work. I'm planning to make a PR back to the ARM upstream repo after this gets more mature (for now, no MPU support is available in this version). Some Cortex-R support related issues in upstream CMSIS: |
ioannisg
approved these changes
Oct 19, 2019
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@galak @nashif @MaureenHelm how can we proceed with this? |
nashif
approved these changes
Oct 22, 2019
stephanosio
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Nov 5, 2019
This commit updates the Cortex-R port to use the preliminary CMSIS-Core(R) implementation added in the PR zephyrproject-rtos#19964. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
stephanosio
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Nov 5, 2019
This commit updates the 'xilinx_zynqmp' SoC initialisation code to use the preliminary CMSIS-Core(R) implementation added in the PR zephyrproject-rtos#19964. In addition, it also defines the Core IP revision value for the SoC as specified in the Zynq UltraScale+ Device Technical Reference Manual. Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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This PR is part of the preparations for #19644.