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soc: arm: xilinx_zynqmp: Relocate platform-specific initialisation. #20478

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stephanosio
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@stephanosio stephanosio commented Nov 8, 2019

This commit relocates the exception vector table address range
configuration routine that was previously implemented as part of
Cortex-R architecture reset function to SoC platform-specific
initialisation routine.

Signed-off-by: Stephanos Ioannidis root@stephanos.io

NOTE:

  • Separated out from Cortex-R Port Improvement for 2.2 #19698 for timely review and merging.
  • SCTLR.HIVECS is currently configured to xilinx_zynqmp SoC-specific value by reset.S. Since this causes boot failure when run on other SoCs that use different HIVECS configuration, it must be configured by the SoC platform init code.

This commit relocates the exception vector table address range
configuration routine that was previously implemented as part of
Cortex-R architecture reset function to SoC platform-specific
initialisation routine.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
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This PR depends on the PR #20468 and #20473.

@stephanosio stephanosio added bug The issue is a bug, or the PR is fixing a bug DNM This PR should not be merged (Do Not Merge) labels Nov 8, 2019
@stephanosio stephanosio mentioned this pull request Nov 12, 2019
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@stephanosio stephanosio added this to the v2.2.0 milestone Dec 9, 2019
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Integrated into #20473 as this change is dependent on the new reset vector function implementation.

@stephanosio stephanosio closed this Jan 2, 2020
@stephanosio stephanosio deleted the cortex_r_fix_zynqmp_platform_specific_init branch January 2, 2020 09:43
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