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drivers: add GIC V3 driver #24850

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merged 1 commit into from
May 7, 2020

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sandeepbrcm
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@sandeepbrcm sandeepbrcm commented Apr 30, 2020

Add basic driver for GIC V3 interrupt controller.

This implementation supports

  • distributor, re-distributor and cpu interface initialization
  • configuration and handling of SPI, PPI and SGI.
  • V2 Legacy mode is not supported and uses system interface.

Current implementation supports GIC secure state only.
All interrupts are routed to Secure EL1 as 'irq' by configuring
them as Group1 Secure.

TODO:

  • MPIDR based affinity routing setting.
  • percpu redistributor probe
  • message based SPI and SGI generation api
  • EL1NS support. Legacy mode support.
  • LPI/ITS is not supported.

[update v2] Changes in this version:

  • Macro to select applicable base based on SPI/SGI/PPI and core id.
  • GIC_DIST_XXX for common offsets naming which can be reused in GICv2 v3 common code.
  • correction of rwp for GICR.
  • Rdist base address is an array now to support multicore.
  • defines moved to header under GICv3 config.
    [update v3]
    changes around common macro placements in gic.h intc_gic_common_priv.h
    gicv3 specific private macros are moved to intc_gicv3_priv.h
    [update v4]
    Used appt macro names to be better intuitive as per review comments
    Signed-off-by: Sandeep Tripathy sandeep.tripathy@broadcom.com

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@Abhishek-brcm You comments are addressed in this version of PR.

@zephyrbot zephyrbot added the area: API Changes to public APIs label Apr 30, 2020
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sandeepbrcm commented Apr 30, 2020

@stephanosio Please give your feedback on the approach. GICV3 and GICV2 have some common
programming sequences w.r.t distributor. But GICV3 redistributor have differences. the Read-write progress and RDIST init are differences in basic driver implementation. If more features to be added in future then it will be bit difficult to have both V2 and V3 together.

@stephanosio stephanosio requested a review from galak May 2, 2020 06:27
@zephyrbot zephyrbot added the area: API Changes to public APIs label May 4, 2020
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zephyrbot commented May 4, 2020

All checks passed.

Tip: The bot edits this comment instead of posting a new one, so you can check the comment's history to see earlier messages.

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@stephanosio I tested the common macros and functions in local workspace with Qemu GICv2.
But there are #ifdefs and will require a little more work. ( next PR/RFC)
Please review this PR w.r.t current scope as I would like this one to be merged to unblock our base platform support.

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@Abhishek-brcm Abhishek-brcm left a comment

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I think GICv3 driver is in good shape now. It has introduced few common macros, which we can expect to be used in GICv2 driver later and consequently, make some APIs common in between these two.

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A few minor issues, but it looks ok overall.

Add basic driver for GIC V3 interrupt controller.

This implementation supports
 - distributor, re-distributor and cpu interface initialization
 - configuration and handling of SPI, PPI and SGI.
 - V2 Legacy mode is not supported and uses system interface.

Current implementation supports GIC secure state only.
All interrupts are routed to Secure EL1 as 'irq' by configuring
them as Group1 Secure.

TODO:
- MPIDR based affinity routing setting.
- percpu redistributor probe
- message based SPI and SGI generation api
- EL1NS support. Legacy mode support.
- LPI/ITS is not supported.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
@Abhishek-brcm Abhishek-brcm requested a review from carlescufi May 6, 2020 21:34
@sandeepbrcm sandeepbrcm removed the area: API Changes to public APIs label May 7, 2020
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LGTM

@carlescufi carlescufi merged commit bd985dc into zephyrproject-rtos:master May 7, 2020
@sandeepbrcm sandeepbrcm mentioned this pull request Jul 9, 2020
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6 participants