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STM32F7 SoC family and STM32F746G Discovery board basic support #7284
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Codecov Report
@@ Coverage Diff @@
## master #7284 +/- ##
==========================================
- Coverage 64.61% 64.54% -0.08%
==========================================
Files 421 420 -1
Lines 40296 40117 -179
Branches 6803 6762 -41
==========================================
- Hits 26037 25892 -145
+ Misses 11126 11108 -18
+ Partials 3133 3117 -16
Continue to review full report at Codecov.
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- DMA Controller | ||
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More information about STM32F746NGH6 can be found here: | ||
- `STM32F746NGH6 on www.st.com`_ |
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Needs a blank line before the first list item. Also, don't indent, so should look like this:
More information about STM32F746NGH6 can be found here:
- `STM32F746NGH6 on www.st.com`_
- `STM32F74xxx reference manual`_
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Other hardware features are not yet supported on Zephyr porting. | ||
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The default configuration can be found in the defconfig file: |
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This renders better written as:
The default configuration can be found in the defconfig file:
``boards/arm/stm32f746g_disco/stm32f746g_disco_defconfig``
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@dbkinder, I have fixed it.
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One more edit, and you've got some problems reported by shippable: https://app.shippable.com/github/zephyrproject-rtos/zephyr/runs/14153/5/tests
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More information about STM32F746NGH6 can be found here: | ||
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- `STM32F746NGH6 on www.st.com`_ |
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These two lines still need to be not indented...
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Shippable prints warnings like this:
"B4 Second line is not empty". Does this mean that commit message body should have only one line?
Also there is one failed test, but I don't understand how check which exactly test was failed. Are these tests from sanity check?
@pic16f887 It means you need an empty line between commit message header and body.
Please also check: http://docs.zephyrproject.org/1.9.0/contribute/contribute_guidelines.html#commit-guidelines |
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Additional remarks but it goes in good direction.
General points:
- Add at least a one line comment in your commit messages, otherwise CI will fail
- Enhance commit separation (lot of gpio, clock, uart related code ) in initial commit
Specific for Clock control:
You need to take car of the code under ifdef F4X in stm32_ll_clock.c, it is applicable to F7 as well.
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config NUM_IRQS | ||
int | ||
default 97 |
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98 (when counting IRQ 0)
} bit; | ||
}; | ||
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/* 3.8.7 Embedded flash registers */ |
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3.7
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* Based on reference manual: | ||
* | ||
* Chapter 3.4: Embedded Flash Memory |
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Chapter 3:
*/ | ||
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/* 6.4 GPIO registers - each GPIO port controls 16 pins */ | ||
struct stm32f7x_gpio { |
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Please use exact names as mentioned in Reference manual:
moder, otyper, ospeedr, ....
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In my opinion names like moder aren't human readable. I think it would better to left it like for STMF4 series or add ending reg, for example mode_reg.
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I think that we should use naming rules that are not subjective, and then will not vary depending on the developer.
Hence, when possible, aligning on ref manual is the better option to me.
arch/arm/soc/st_stm32/stm32f7/soc.c
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irq_unlock(key); | ||
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/* Update CMSIS SystemCoreClock variable (HCLK) */ | ||
/* At reset, system core clock is set to 25 MHz from HSI */ |
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HSI is 16MHz
arch/arm/soc/st_stm32/stm32f7/soc.h
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#include <stm32f7xx_ll_bus.h> | ||
#include <stm32f7xx_ll_rcc.h> | ||
#include <stm32f7xx_ll_system.h> | ||
#include <stm32f7xx_ll_spi.h> |
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Remove spi
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS | ||
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#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS |
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Move these to the commit where you introduce serial driver
Seems we've lost some of your commits .. |
I dropped old commits. I attached only base STM32F7 commit. I will attach rest of updated commits soon. |
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I committed updated code. |
@erwango, what is the policy for IRQ handlers for EXTI >= 16? F4 (and now F7) port enables them in stm32_exti_enable, other families do not. Which way should it be unified? |
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one more edit and we're good to go
- On-board ST-LINK/V2-1 supporting USB re-enumeration capability | ||
- Five power supply options: | ||
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- ST LINK/V2-1 |
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The sublist should be indented to the first character of the text of the parent list:
- Five power supply options:
- ST LINK/V2-1
If you indent it too much, it changes the way the sublist is rendered.
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I have fixed it and updated the commit.
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Thanks!
@erwango, |
arch/arm/soc/st_stm32/stm32f7/soc.c
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* Tick interrupt priority is not used | ||
* @return HAL status | ||
*/ | ||
uint32_t HAL_GetTick(void) |
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Could you remove this function? It is now provided by arch/arm/soc/st_stm32/common/stm32cube_hal.c
@pic16f887, can you rebase on top of just merged #7997 ? |
@erwango |
@@ -521,6 +559,59 @@ static void __stm32_exti_connect_irqs(struct device *dev) | |||
CONFIG_EXTI_STM32_RTC_WKUP_IRQ_PRI, | |||
__stm32_exti_isr_22, DEVICE_GET(exti_stm32), | |||
0); | |||
+#elif CONFIG_SOC_SERIES_STM32F7X |
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The shippable build failed due to this leftover from the rebase. Same issue a few lines below.
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Thank you. I have update the code.
config GPIO_STM32_PORTK | ||
default y | ||
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+endif # GPIO_STM32 |
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I just realized there is still a small rebase issue, there is a +
before the endif
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Thank you. I have updated the code.
Hi @pic16f887, following the merge of #8359, this patchset needs yet another rebase :-(. In the patch |
The patch includes support for STM32F746xG subfamily. Related to issue zephyrproject-rtos#6981. Signed-off-by: Yurii Hamann <yurii@hamann.site>
This patch adds clock control support for STM32F7 family microcontrollers. Signed-off-by: Yurii Hamann <yurii@hamann.site>
Added flash memory support for STM32F7 family microcontrollers Signed-off-by: Yurii Hamann <yurii@hamann.site>
This patch adds GPIO support for STM32F7 family microcontrollers. Signed-off-by: Yurii Hamann <yurii@hamann.site>
This patch adds pinmux header file for STM32F7 famlily microcontrollers Signed-off-by: Yurii Hamann <yurii@hamann.site>
The patch adds serial driver support for STM32F7 family microcontrollers, includes pinmux definitions and DTS fixup file. Signed-off-by: Yurii Hamann <yurii@hamann.site>
This patch adds EXTI support for STM32F7 family microcontrollers. Signed-off-by: Yurii Hamann <yurii@hamann.site>
This patch includes: STM32F7 family device tree file with basic and UART definitions. STM32F746 subfamily device tree file. Memory definitions for STM32F746xG subfamily. Signed-off-by: Yurii Hamann <yurii@hamann.site>
The patch contains basic code support, documentation, dts file and openocd configuration for STM32F746G discovery board. This patch related to the issue zephyrproject-rtos#6982. Signed-off-by: Yurii Hamann <yurii@hamann.site>
Hi @aurel32, |
Hi @pic16f887. Thanks for the rebase, I have just checked, it's all good. |
@erwango, @ydamigos, @dbkinder
I have closed pull request #7220 and created a new one. I had to drop previous PR because it was a mess which is hard to resolve to me (I am newbie in git and GitHub). Sorry for inconvenience.