Feature/rt700 add multicore support cm33 cores #94390
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dsseng
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@TomasGalbickaNXP there are conflicts. |
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@lucien-nxp @Raymond0225 can you help reviewing this? |
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There is a failing sample: |
Is there already an issue reported? |
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Issue: #96158 |
This commit moves common DTS entries into common file dts/arm/nxp/nxp_rt7xx_common.dtsi. This way there is not duplication between cpu0 and cpu1. Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
This commit adds multicore support to copy CM33 CPU1 image from flash to RAM where it will boot from. Also added NXP_IMXRT_BOOT_HEADER=y for CPU0 so it can be booted from FlexSPI Flash. Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
This commit adds multicore support to boot secondary CM33 CPU1 core. - Adds Flash partition for CM33 CPU0 - Boots secondary core Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
This commit adds custom MPU regions for RT700 CM33 CPU0 to define non-cachable region for SRAM. Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
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LGTM ... @hakehuang can you run a regression against the RT700 platform for us and +1 if all is good |
dleach02
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kick mbox and ipc testing for RT700, all cases failed see below, I see the log to you via email. @TomasGalbickaNXP if I reset the board manually, the test cases pass.
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hakehuang
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This PR is providing multicore support for RT700.
It enables to load and boot CM33 CPU1 from CM33 CPU0 core.
And adds support for samples: