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riscv: qemu: combine boards #98447

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@maass-hamburg maass-hamburg commented Oct 28, 2025 •
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  • combine all riscv virto boards into one board and soc, use cpucluster for different base (rv32i, rv32e, rv64i)
  • use dt props for riscv extension to set them for qemu

@maass-hamburg maass-hamburg force-pushed the use_riscv,isa-extentions_extend branch 5 times, most recently from e97e15c to 2df6e04 Compare October 29, 2025 16:06
@maass-hamburg
Kconfig: dt: add dt_node_array_prop_has_val
d304fe7 
add dt_node_array_prop_has_val function and
extend dt_nodelabel_array_prop_has_val to be
used with string-arrays.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
riscv: use riscv,isa-extensions dt prop
1a619da 
implement and use riscv,isa-extensions
dt prop, like in linux
https://www.kernel.org/doc/Documentation/devicetree/bindings/riscv/extensions.yaml
to set the riscv extentions.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
riscv: make riscv,isa dt prop no longer required
c151361 
make riscv,isa dt prop no longer required,
as it is is not really used by anyrhing in zephyr
and we now have a alternative (riscv,isa-base
and riscv,isa-extensions).

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
litex: use riscv,isa-extensions dt prop
c7f6d99 
use riscv,isa-extensions dt prop for
litex vexriscv soc.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
qemu: riscv: use riscv,isa-extensions dt prop
ede0833 
use riscv,isa-extensions dt prop for
qemu riscv boards.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
arch: riscv: add dependencies to FLOAT_HARD
aced751 
1. it reguires that there are floating point registers,
so the extention f is required. (zfinx uses the int regs instead)
2. RV32E doesn't supports hardware floating-point calling convention.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
riscv: gcc: seperate fpu mabi and march part
7f76b27 
seperate fpu mabi and march part, also use
the extention for the march part to make it
easier to add Zfinx and Zdinx later.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
riscv: gcc: use string(APPEND
a37351d 
use string(APPEND instead of
string(CONCAT where possible.
Makes it shorter.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
boards: qemu: combine riscv boards
0ce9904 
combine riscv boards and use the
dt props to configure qemu with the
right riscv isa and extensions

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
boards: qemu: use dt to set SOC
fbf89bc 
use dt to set SOC of the qemu riscv board.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg
boards: qemu: riscv: combine boards into one
a44fd54 
combine board into one and use
cpu cluster for rv32, rv32e and rv64
variants

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
@maass-hamburg maass-hamburg force-pushed the use_riscv,isa-extentions_extend branch from 2df6e04 to a44fd54 Compare October 29, 2025 17:01
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sonarqubecloud bot commented Oct 29, 2025

Quality Gate Passed Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

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@maass-hamburg
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maass-hamburg commented Oct 29, 2025

@fkokosinski what do you think about this?

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