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STM32L4 : Fix GPIO G port compatibility #3780
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Hello, thank you for your contribution.
Please apply the comment I have done. I think it is (at least one of) the reason why the travis build has failed.
Kind regards
Armelle
@@ -79,7 +79,17 @@ uint32_t Set_GPIO_Clock(uint32_t port_idx) | |||
gpio_add = GPIOE_BASE; | |||
__HAL_RCC_GPIOE_CLK_ENABLE(); | |||
break; | |||
#endif | |||
#endif | |||
case PortF: |
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Hello, can you please add #if defined (GPIOF_BASE) ?
This file is located in STM32_L4 directory and shall be compatible with every STM32L4 device. STM32L432 for instance doesn't have GPIO port F or G.
gpio_add = GPIOF_BASE; | ||
__HAL_RCC_GPIOF_CLK_ENABLE(); | ||
break; | ||
case PortG: |
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Hello, can you please add #if defined (GPIOG_BASE) ?
@pmancele Can you please sign CLA: https://developer.mbed.org/contributor_agreement/ |
Please look at travis, it fails (please test this patch set for various targets that it at least compiles). |
@0xc0170 I already signed the CLA with my acount on developer.mbed.org. My acount on developer.mbed.com and GitHub have different names but the same mail address |
LGTM |
Mind dropping a link to your developer account? |
/morph test |
Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
@sg- @0xc0170 here is a link to my developper account on which i signed the CLA https://developer.mbed.org/users/peyo/ |
@pmancele Thanks |
@pmancele Needs a conflict resolved. |
@sg- wow it seems that the MR #3665 changed a lots of STM files. Now there is a file at a higher level which enable the gpio clocks (targets/TARGET_STM/gpio_api.c) The GPIOG_clock_enable() is now defined for targets which have a G port, but the function to activate the VDDIO2 power supply is still missing for targets who need it (at least all the STL32L476xx that have a G port)
(my modifications are the 4 lines starting with a "+") What do you think of this @adustm ? Maybe all L4 need the VDDIO2 power supply for G port so it should be, EDIT : I checked and the use of VDDIO2 to supply G port is common to all L4 family so I will insert a |
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Thanks for your contribution 👍
/morph test |
Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
retest uvisor |
ping |
Ports for Upcoming Targets Fixes and Changes 3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files ARMmbed/mbed-os#3716 3741: STM32 remove warning in hal_tick_32b.c file ARMmbed/mbed-os#3741 3780: STM32L4 : Fix GPIO G port compatibility ARMmbed/mbed-os#3780 3831: NCS36510: SPISLAVE enabled (Conflict resolved) ARMmbed/mbed-os#3831 3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os ARMmbed/mbed-os#3836 3840: STM32: gpio SPEED - always set High Speed by default ARMmbed/mbed-os#3840 3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) ARMmbed/mbed-os#3844 3850: STM32: change spi error to debug warning ARMmbed/mbed-os#3850 3860: Define GPIO_IP_WITHOUT_BRR for xDot platform ARMmbed/mbed-os#3860 3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated ARMmbed/mbed-os#3880 3795: Fix pwm period calc ARMmbed/mbed-os#3795 3828: STM32 CAN API: correct format and type ARMmbed/mbed-os#3828 3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization ARMmbed/mbed-os#3842 3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) ARMmbed/mbed-os#3843 3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. ARMmbed/mbed-os#3879 3902: Fix heap and stack size for NUCLEO_F746ZG ARMmbed/mbed-os#3902 3829: can_write(): return error code when no tx mailboxes are available ARMmbed/mbed-os#3829
Description
Fix #3771 by adding functions to enable GPIOF and GPIOG clocks for STM32L4 targets.
For GPIOG the VDDIO2 external VDD is also activated as it is the one who supply pins PG2 to PG15