Skip to content

Implementing USM memory management #34

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 41 commits into from
Sep 19, 2020

Conversation

PokhodenkoSA
Copy link
Contributor

@PokhodenkoSA PokhodenkoSA commented Sep 15, 2020

Closes #27.
Cython module created.
Need refactoring for matching new requirements.

Contains changes from #30.

@diptorupd
Copy link
Contributor

#34 needs to go after #30. I have rebased #30 on top of #28 and #29

diptorupd and others added 22 commits September 15, 2020 23:23
…erfaces.

     - Separates out the queue manager from the sycl queue interface wrapper.
     - Added API to get context, device froma  Sycl queue.
     - Added C-API wrappers for sycl device, queue, context interfaces exposing
       some of the API functionalities. More can be added as needed.
     - The dppl extension now defines extension types for sycl quque, device, context to
       mimic the C API.
     - Sycl queues are now returned to callers as a SyclQueue extension type rather than
       a Py_capsule.
Copy link
Contributor Author

@PokhodenkoSA PokhodenkoSA left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Main: pass context to Memory constructor.

dppl/_memory.pyx Outdated
Comment on lines 24 to 29
if (ptr_type == "shared"):
p = DPPLmalloc_shared(nbytes, q.get_queue_ref())
elif (ptr_type == "host"):
p = DPPLmalloc_host(nbytes, q.get_queue_ref())
elif (ptr_type == "device"):
p = DPPLmalloc_device(nbytes, q.get_queue_ref())
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Need better solution. Polymorphism?

@@ -0,0 +1,106 @@
##===------------- backend.pyx - DPPL interface ------*- Cython -*-------===##
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

New name for the file needed.

}

extensions = [
Extension('dppl._sycl_core', [os.path.abspath('dppl/sycl_core.pyx'),],
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Rename sycl_core.pyx to _sycl_core.pyx. #38

@diptorupd diptorupd mentioned this pull request Sep 19, 2020
@PokhodenkoSA
Copy link
Contributor Author

@diptorupd I have fixed all critical remarks. Could you please review it?

@diptorupd
Copy link
Contributor

Looks good. Thanks :). Let's merege

@diptorupd diptorupd merged commit c9b2f94 into IntelPython:master Sep 19, 2020
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
enhancement New feature or request
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Implementing USM memory management in dpCtrl
2 participants