Few fixes

SpinalHDL · Jan 5, 2024 · 7b27eca · 7b27eca
1 parent 1990468
commit 7b27eca
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Showing 5 changed files with 16 additions and 8 deletions.
diff --git a/src/main/scala/spinal/lib/misc/database/DataBase.scala b/src/main/scala/spinal/lib/misc/database/DataBase.scala
@@ -46,8 +46,10 @@ abstract class Element[T](sp: ScopeProperty[Database] = Database) extends Nameab
  def get : T = getOn(sp.get)
  def apply: T = getOn(sp.get)
  def set(value: T): Unit = set(sp.get, value)
+ def isEmpty : Boolean = isEmpty(sp.get)
 
  // private API
+ def isEmpty(db: Database) : Boolean
  def getOn(db: Database) : T
  def set(db: Database, value: T) : Unit
 }
@@ -56,6 +58,7 @@ abstract class Element[T](sp: ScopeProperty[Database] = Database) extends Nameab
 class ElementValue[T](sp : ScopeProperty[Database] = Database) extends Element[T](sp) {
  def getOn(db: Database): T = db.storageGet(this)
  def set(db: Database, value: T) = db.storageUpdate(this, value)
+ override def isEmpty(db: Database): Boolean = ???
 }
 
 // Layered with a handle to allow blocking "get"
@@ -67,6 +70,7 @@ class ElementBlocking[T](sp : ScopeProperty[Database] = Database) extends Elemen
  assert(!getHandle(db).isLoaded)
  getHandle(db).load(value)
  }
+ override def isEmpty(db: Database): Boolean = !getHandle(db).isLoaded
 }
 
 // The body provide the processing to generate the value

diff --git a/src/main/scala/vexiiriscv/execute/DivPlugin.scala b/src/main/scala/vexiiriscv/execute/DivPlugin.scala
@@ -22,7 +22,9 @@ class DivPlugin(val layer : LaneLayer,
  val writebackAt : Int = 0) extends ExecutionUnitElementSimple(layer){
  import DivPlugin._
 
- val logic = during build new Logic {
+ val logic = during setup new Logic {
+ awaitBuild()
+
  val formatBus = ifp.access(writebackAt)
  implicit val _ = ifp -> formatBus
 

diff --git a/src/main/scala/vexiiriscv/execute/MulPlugin.scala b/src/main/scala/vexiiriscv/execute/MulPlugin.scala
@@ -29,7 +29,9 @@ class MulPlugin(val layer : LaneLayer,
  var bufferedHigh : Option[Boolean] = None) extends ExecutionUnitElementSimple(layer){
  import MulPlugin._
 
- val logic = during build new Logic {
+ val logic = during setup new Logic {
+ Riscv.RVM.set(true)
+ awaitBuild()
  import SrcKeys._
 
  if (bufferedHigh == None) bufferedHigh = Some(Riscv.XLEN >= 64)

diff --git a/src/main/scala/vexiiriscv/riscv/Misc.scala b/src/main/scala/vexiiriscv/riscv/Misc.scala
@@ -8,5 +8,5 @@ object Riscv{
  val XLEN = blocking[Int]
  val FLEN = blocking[Int]
  val LSLEN = blocking[Int]
- val RVC, RVD, RVF, RVA = blocking[Boolean]
+ val RVC, RVM, RVD, RVF, RVA = blocking[Boolean]
 }
diff --git a/src/main/scala/vexiiriscv/riscv/RiscvPlugin.scala b/src/main/scala/vexiiriscv/riscv/RiscvPlugin.scala
@@ -7,14 +7,14 @@ import vexiiriscv.decode.Decode
 import vexiiriscv.fetch.Fetch
 
 class RiscvPlugin(var xlen : Int,
- var rvc : Boolean,
  var hartCount : Int) extends FiberPlugin{
 
  val logic = during build new Area{
- Riscv.RVC.set(rvc)
- Riscv.RVF.set(false)
- Riscv.RVD.set(false)
- Riscv.RVA.set(false)
+ if(Riscv.RVC.isEmpty) Riscv.RVC.set(false)
+ if(Riscv.RVM.isEmpty) Riscv.RVM.set(false)
+ if(Riscv.RVF.isEmpty) Riscv.RVF.set(false)
+ if(Riscv.RVD.isEmpty) Riscv.RVD.set(false)
+ if(Riscv.RVA.isEmpty) Riscv.RVA.set(false)
  Riscv.XLEN.set(xlen)
  Riscv.FLEN.set(List(Riscv.RVF.get.toInt*32, Riscv.RVD.get.toInt*64).max)
  Riscv.LSLEN.set(List(Riscv.XLEN.get, Riscv.FLEN.get).max)