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Add examples with tiny RISCV #236

Merged
merged 1 commit into from
Mar 17, 2024
Merged

Add examples with tiny RISCV #236

merged 1 commit into from
Mar 17, 2024

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yrabbit
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@yrabbit yrabbit commented Mar 17, 2024

Examples of implementation of lessons 15, 16 and 18 from the Bruno Levy course are added
(https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/README.md).

These are parts devoted to the use of inferred BRAM for reading (15), for writing (16) and a complex example with the output of the Malderbrot set via UART (18). Lessons are implemented for Tangnano4k, Tangnano9k and Tangnano20k boards.

The main function of these three examples is to serve as a canary in the mine, to detect regressions when making changes - like attosoc, but with the possibility of gradually simplifying the design - in particularly difficult cases, you can move along the original lessons from the 15th down to the 1st.

Since no new primitives are used there, there is no point in including them in the unpacking.

It might be worth implementing them for other boards where there are enough LUTs for this riscv.

Also a minor change so that new versions of Python do not swear at regular expressions.

Another purpose of including a small riscv is that it is useful for demonstrating the operation of DSP primitives via UART - when working with 18-bit numbers, the LEDs are no longer enough very quickly.

Examples of implementation of lessons 15, 16 and 18 from the Bruno Levy
course are added
(https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/TUTORIALS/FROM_BLINKER_TO_RISCV/README.md).

These are parts devoted to the use of inferred BRAM for reading (15),
for writing (16) and a complex example with the output of the Malderbrot
set via UART (18).  Lessons are implemented for Tangnano4k, Tangnano9k
and Tangnano20k boards.

The main function of these three examples is to serve as a canary in the
mine, to detect regressions when making changes - like attosoc, but with
the possibility of gradually simplifying the design - in particularly
difficult cases, you can move along the original lessons from the 15th
down to the 1st.

Since no new primitives are used there, there is no point in including
them in the unpacking.

It might be worth implementing them for other boards where there are
enough LUTs for this riscv.

Also a minor change so that new versions of Python do not swear at
regular expressions.

Another purpose of including a small riscv is that it is useful for
demonstrating the operation of DSP primitives via UART - when working
with 18-bit numbers, the LEDs are no longer enough very quickly.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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@pepijndevos pepijndevos left a comment

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Ohh very nice

@yrabbit yrabbit merged commit 19a2aab into YosysHQ:master Mar 17, 2024
12 of 14 checks passed
@yrabbit yrabbit deleted the femto-riscv branch March 17, 2024 08:50
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2 participants