more documentation on synthesized primitives, please

[ghost]

I'd like to know what the $macc, $alu and $lcu nodes do.
Also, $_DLATCH_ variants.

[cliffordwolf]

Type e.g. help $macc or help $_DLATCH_P_ on the yosys command prompt (or run e.g. yosys -h '$macc' from a shell) to display the help message for a cell type. Not all cell types have a help message yet (e.g. most of the lowercase named "RTL" type cells don't; this is work in progress), but all cell types have a Verilog simulation model that can be displayed e.g. with help $macc+ (as indicated by the help $macc output).

I'll leave this ticket open as a reminder to continue writing cell type help messages..

[povik]

As of today there's only a few coarse cells that have help messages, most don't. On the other hand the internal gate cells all seem to have a help text. Help texts for cells are parsed out from techlibs/common/simcells.v and .../simlib.v.

[NachtSpyder04]

Hello,
I would like to work on this issue.

Can anyone guide me which cells should I target first?

[povik]

I would suggest to start with the simple ones (equality operators $eq, $neq, arithmetic comparison $lt and friends, $logic_* operators).