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Add support for RISC-V #1182
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This will probably be fixed by #1174. |
It does not explain how to contribute into RISC-V port and how (at least) to allow the compilation of the crate. |
Option::unwrap()
on a None
value', while building pravega-client-rust (on RISC-V)
The work we're doing to enable all the features on wasm32, MIPS, etc. will enable ring to work on RISC-V. Then we can add CI/CD jobs that verify ring builds for RISC-V. Ideally we'd also have optimized assembly for RISC-V too, eventually. |
I'm also looking forward to RISC-V support! |
While trying to build
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I was trying to build https://github.com/prisma/prisma-engines . Using the latest openssl $ rustup show
Default host: riscv64gc-unknown-linux-gnu
rustup home: /home/ubuntu/.rustup
installed targets for active toolchain
--------------------------------------
aarch64-unknown-linux-gnu
armv7-unknown-linux-gnueabihf
riscv64gc-unknown-linux-gnu
x86_64-unknown-linux-gnu
active toolchain
----------------
stable-riscv64gc-unknown-linux-gnu (default)
rustc 1.60.0 (7737e0b5c 2022-04-04) Below is the error output from
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fwiw, we're using those changes in Android (https://android-review.googlesource.com/c/platform/external/rust/crates/ring/+/2408495/4)... |
Note, this is regressing https://github.com/nextest-rs/nextest which worked on RISC-V before they pulled in ring :( |
do we have any updates? I see there are a few PRs trying to resolve this but they are all pending. |
Hi briansmith, I am not able to build ring v0.16.20 on riscv64 platform, i added line from link-light4@4d5dde5#diff-a746f36ad550c7ba0b9d8557d26374079a51cccec2555a5e023129e32af6b789 After changing in source code from above link, i am not able to build successfully, can you look on output-
here if i am wrong , can you guide me to build ring v0.16.20 on target board on riscv64 platform. T&R |
Remove cert generation and revert back from ring -> sha2 briansmith/ring#1182
warp cannot be built on riscv64 in the near future as it is rust and its crate 'ring' does not support RISC-V: briansmith/ring#1182 Reported-by: Ivan A. Melnikov <iv at altlinux.org>
It works now. Because RISC-V doesn't have carry/borrow flags, the math probably is far from optimal. But it builds as of PR #1627. |
hi - i received this error "ring@0.17.8: include/ring-core/target.h:64:2: error: "Unknown target CPU"". Is there a version that I should use to resolve? I'm building on SP1 and encountered this issue at compile time. |
Hi.
Looks like there is no support for RISC-V arch.
I was trying to build https://github.com/pravega/pravega-client-rust .
CC @Tristan1900 @zwx14700 @shrids .
Here is what I tried:
The text was updated successfully, but these errors were encountered: