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Fix link to Naming Cookbook #2356

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Jan 20, 2022
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Fix link to Naming Cookbook #2356

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2 changes: 1 addition & 1 deletion docs/src/cookbooks/cookbook.md
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Expand Up @@ -440,7 +440,7 @@ chisel3.stage.ChiselStage.emitVerilog(new CountBits(4))

### How do I get Chisel to name signals properly in blocks like when/withClockAndReset?

Use the compiler plugin, and check out the [Naming Cookbook](#naming) if that still does not do what you want.
Use the compiler plugin, and check out the [Naming Cookbook](naming) if that still does not do what you want.

### How do I get Chisel to name the results of vector reads properly?
Currently, name information is lost when using dynamic indexing. For example:
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