buswrapper: for stability, genericize inner coupler port name (#2515)

chipsalliance · Jun 16, 2020 · c51a781 · c51a781
1 parent 6ddcdf9
commit c51a781
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/src/main/scala/tilelink/BusWrapper.scala b/src/main/scala/tilelink/BusWrapper.scala
@@ -76,10 +76,10 @@ abstract class TLBusWrapper(params: HasTLBusParams, val busName: String)(implici
   }
 
   def coupleTo[T](name: String)(gen: TLOutwardNode => T): T =
-    to(name) { gen(outwardNode) }
+    to(name) { gen(TLNameNode("tl") :*=* outwardNode) }
 
   def coupleFrom[T](name: String)(gen: TLInwardNode => T): T =
-    from(name) { gen(inwardNode) }
+    from(name) { gen(inwardNode :*=* TLNameNode("tl")) }
 
   def crossToBus(bus: TLBusWrapper, xType: ClockCrossingType)(implicit asyncClockGroupNode: ClockGroupEphemeralNode): NoHandle = {
     bus.clockGroupNode := asyncMux(xType, asyncClockGroupNode, this.clockGroupNode)