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Add example_spi_host_quadIO #401

Merged
merged 25 commits into from
Nov 24, 2023
Merged

Add example_spi_host_quadIO #401

merged 25 commits into from
Nov 24, 2023

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consanii
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Add example_spi_host_quadIO application in sw/applications subfolder.

It is based on example_spi_host and showcase the QuadSPI capabilities of the X-heep spi_host module.



// Create segment 2
uint32_t read_byte_cmd = (REVERT_24b_ADDR(flash_original) | 0xFF << 24); // Fxh (here FFh) required by W25Q128JW
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why?

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W25Q128JW datasheet on page 33 describe the behaviour of line 221.
In short, after the command code at single speed the flash expect to receive the memory address MSB first at quad speed(so a Byte swap is require in a little-endian architecture). After it, a dummy byte at quad speed of value Fxh is required.
A detailed showcase of this behaviour can be also found in one OpenTitan diagram.

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sorry I was not clear, what I meant this comment Fxh (here FFh) required by W25Q128JW I do not understand what Fxh means

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@consanii consanii Oct 17, 2023

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I found no clear description on the data sheet. I though it is an hexadecimal with first 4 bits all ones (F) and the next four can be whatever (x).
Anyway in the opentitan documentation (linked in the message before) I saw a diagram with the byte after the address with all ones so I decided to implement it like opentitan (FFh).

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ok thanks for the clarification

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another question @consanii , I see in the single mode SPI examples that the address is shifted by 8 after reversed, and then ored with 03, here you do reverse, or with ff, but I do not see the shift by 8, why?

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Because the behaviour in single and quad modes differs. In quad mode, the command code must be sent at standard speed before sending the address + Fxh afterward. There is no need to shift the address to make space for the command because the command is already transmitted.

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pls add (0xFF<<24) in parenthesis so that is clear that the OR is the last thing

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davideschiavone commented Nov 8, 2023

  • waiting for FPGA test

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consanii commented Nov 9, 2023

Note on the update: the QE bit must be already set as the example is not taking care of it as of now

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QE bit is now set automatically by the application before read

@davideschiavone davideschiavone merged commit 6c575f4 into esl-epfl:main Nov 24, 2023
3 checks passed
mbelda added a commit to mbelda/HEEPsilon that referenced this pull request Mar 15, 2024
Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 76d58efe7b9dec0723c1cb9aaf8ad76ad6c85373

* Update ci (esl-epfl/x-heep#454) (Luigi Giuffrida)
* fix num of FPGAs in README (Davide Schiavone)
* Porting Ultrascale ZCU104 board (esl-epfl/x-heep#435) (jmiranda)
* Add absolute path to `CMakeLists.txt` match statements (esl-
  epfl/x-heep#469) (Michele Caon)
* add SystemC example (esl-epfl/x-heep#443) (Davide Schiavone)
* Structs multireg fix (esl-epfl/x-heep#466) (Stefano Albini)
* add Coremark and update cv32e40p (esl-epfl/x-heep#465) (Davide
  Schiavone)
* add tiled matmul (esl-epfl/x-heep#464) (Davide Schiavone)
* fix software errors/warnings (esl-epfl/x-heep#462) (Davide
  Schiavone)
* add xcelium support (esl-epfl/x-heep#452) (Davide Schiavone)
* Add matmul example (esl-epfl/x-heep#461) (Davide Schiavone)
* fix typo in debug_ss (esl-epfl/x-heep#460) (Luigi Giuffrida)
* update riscv_dbg (esl-epfl/x-heep#230) (Davide Schiavone)
* Fix esl-epfl/x-heep#430 (esl-epfl/x-heep#459) (David Mallasén
  Quintana)
* fix esl-epfl/x-heep#447 (esl-epfl/x-heep#453) (Davide Schiavone)
* fix typo (esl-epfl/x-heep#458) (Luigi Giuffrida)
* add OpenOCD BSCAN configuration file  (esl-epfl/x-heep#457) (Luis
  Waucquez)
* Removed repeated code in dma hal (esl-epfl/x-heep#456) (Juan-n-only)
* Fix linker script generation (esl-epfl/x-heep#451) (Luigi Giuffrida)
* Add a target to the Makefile to directly program the FPGA (esl-
  epfl/x-heep#450) (Luigi Giuffrida)
* [hw/sw] update flash load linker script, data_interleaved and
  data_flash_only sections (esl-epfl/x-heep#399) (Davide Schiavone)
* add simple accelerator example (esl-epfl/x-heep#446) (Davide
  Schiavone)
* change python format for Bootrom (esl-epfl/x-heep#442) (Davide
  Schiavone)
* fix memset bug (esl-epfl/x-heep#439) (Mattia Consani)
* update cv32e40px with dual-read support (esl-epfl/x-heep#441)
  (Davide Schiavone)
* Added X-HEEP Reference. (esl-epfl/x-heep#440) (Simone Machetti)
* add w25q128 flash BSP (esl-epfl/x-heep#433) (Mattia Consani)
* removed FEMU (esl-epfl/x-heep#437) (Simone Machetti)
* update cve2 (esl-epfl/x-heep#284) (Davide Schiavone)
* porting X-HEEP to the nexys FPGA (esl-epfl/x-heep#432) (Davide
  Schiavone)
* Add standard and quad write functionality to flash model (esl-
  epfl/x-heep#426) (Mattia Consani)
* revert 🐛 introduced in last revendor of iceprog (davide
  schiavone)
* Add `example_spi_host_quadIO`  (esl-epfl/x-heep#401) (Mattia
  Consani)
* fix minimal cfg with stack and heap size (esl-epfl/x-heep#431)
  (Davide Schiavone)
* Update verible url (esl-epfl/x-heep#428) (David Mallasén Quintana)
* expose DMA slots externally + external FIFO example (esl-
  epfl/x-heep#417) (grinningmosfet)
* Updated the documentation on how to add external interrupts (esl-
  epfl/x-heep#427) (Juan-n-only)
* add citation in readme (Davide Schiavone)
* Fix run-blinky-freertos command (esl-epfl/x-heep#424) (jmiranda)
* Compilation fix (esl-epfl/x-heep#422) (jmiranda)
* add stack and heap size as parameters to mcu-gen (esl-
  epfl/x-heep#419) (Luigi Giuffrida)

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>
JoseCalero added a commit to esl-epfl/HEEPsilon that referenced this pull request Oct 8, 2024
* fixes on sw for interleaved memory

* revendor x-heep

* Update esl_epfl_x_heep to esl-epfl/x-heep@76d58ef

Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 76d58efe7b9dec0723c1cb9aaf8ad76ad6c85373

* Update ci (esl-epfl/x-heep#454) (Luigi Giuffrida)
* fix num of FPGAs in README (Davide Schiavone)
* Porting Ultrascale ZCU104 board (esl-epfl/x-heep#435) (jmiranda)
* Add absolute path to `CMakeLists.txt` match statements (esl-
  epfl/x-heep#469) (Michele Caon)
* add SystemC example (esl-epfl/x-heep#443) (Davide Schiavone)
* Structs multireg fix (esl-epfl/x-heep#466) (Stefano Albini)
* add Coremark and update cv32e40p (esl-epfl/x-heep#465) (Davide
  Schiavone)
* add tiled matmul (esl-epfl/x-heep#464) (Davide Schiavone)
* fix software errors/warnings (esl-epfl/x-heep#462) (Davide
  Schiavone)
* add xcelium support (esl-epfl/x-heep#452) (Davide Schiavone)
* Add matmul example (esl-epfl/x-heep#461) (Davide Schiavone)
* fix typo in debug_ss (esl-epfl/x-heep#460) (Luigi Giuffrida)
* update riscv_dbg (esl-epfl/x-heep#230) (Davide Schiavone)
* Fix esl-epfl/x-heep#430 (esl-epfl/x-heep#459) (David Mallasén
  Quintana)
* fix esl-epfl/x-heep#447 (esl-epfl/x-heep#453) (Davide Schiavone)
* fix typo (esl-epfl/x-heep#458) (Luigi Giuffrida)
* add OpenOCD BSCAN configuration file  (esl-epfl/x-heep#457) (Luis
  Waucquez)
* Removed repeated code in dma hal (esl-epfl/x-heep#456) (Juan-n-only)
* Fix linker script generation (esl-epfl/x-heep#451) (Luigi Giuffrida)
* Add a target to the Makefile to directly program the FPGA (esl-
  epfl/x-heep#450) (Luigi Giuffrida)
* [hw/sw] update flash load linker script, data_interleaved and
  data_flash_only sections (esl-epfl/x-heep#399) (Davide Schiavone)
* add simple accelerator example (esl-epfl/x-heep#446) (Davide
  Schiavone)
* change python format for Bootrom (esl-epfl/x-heep#442) (Davide
  Schiavone)
* fix memset bug (esl-epfl/x-heep#439) (Mattia Consani)
* update cv32e40px with dual-read support (esl-epfl/x-heep#441)
  (Davide Schiavone)
* Added X-HEEP Reference. (esl-epfl/x-heep#440) (Simone Machetti)
* add w25q128 flash BSP (esl-epfl/x-heep#433) (Mattia Consani)
* removed FEMU (esl-epfl/x-heep#437) (Simone Machetti)
* update cve2 (esl-epfl/x-heep#284) (Davide Schiavone)
* porting X-HEEP to the nexys FPGA (esl-epfl/x-heep#432) (Davide
  Schiavone)
* Add standard and quad write functionality to flash model (esl-
  epfl/x-heep#426) (Mattia Consani)
* revert 🐛 introduced in last revendor of iceprog (davide
  schiavone)
* Add `example_spi_host_quadIO`  (esl-epfl/x-heep#401) (Mattia
  Consani)
* fix minimal cfg with stack and heap size (esl-epfl/x-heep#431)
  (Davide Schiavone)
* Update verible url (esl-epfl/x-heep#428) (David Mallasén Quintana)
* expose DMA slots externally + external FIFO example (esl-
  epfl/x-heep#417) (grinningmosfet)
* Updated the documentation on how to add external interrupts (esl-
  epfl/x-heep#427) (Juan-n-only)
* add citation in readme (Davide Schiavone)
* Fix run-blinky-freertos command (esl-epfl/x-heep#424) (jmiranda)
* Compilation fix (esl-epfl/x-heep#422) (jmiranda)
* add stack and heap size as parameters to mcu-gen (esl-
  epfl/x-heep#419) (Luigi Giuffrida)

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>

* revendor x-heep Luigi fix

* Update esl_epfl_x_heep to LuigiGiuffrida98/x-heep@849539d

Update code from upstream repository
https://github.com/Luigi2898/x-heep.git to revision
849539ddf996926f9b679837f3bc84c0799287bb

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>

* 1. Port ZCU / 2. fix xdc file for the ZCU / 3. Fix top to include dif clk for ZCU

* added new pin and constraint files

* removed vendor modification

* Add matmul example

* Add matmul os example

* Add transformer example

* add transformer example

* reduced transformer example

* adapt minimal cfg for the cgra

* revendorizing oe-cgra

* revendorizing x-heep

* fix makefile and .core files

* Fixing .core for heepsilon

* Fixing .core for heepsilon: adding parameters

* Fixing .core for heepsilon: adding parameters v2

* Update .core and xheep vendor

* Re-vendorizing x-heep to last commit

* Updating HEEPsilon to the final version, plus fixing CGRA memory generation conflicts (generate_sram_...tcl(s))

* deleting fpga xheep link

---------

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>
Co-authored-by: mbelda <11842513+mbelda@users.noreply.github.com>
Co-authored-by: Miranda Calero José Angel <jamirand@eslsrv11.intranet.epfl.ch>
JoseCalero added a commit to esl-epfl/HEEPsilon that referenced this pull request Oct 8, 2024
* fixes on sw for interleaved memory

* revendor x-heep

* Update esl_epfl_x_heep to esl-epfl/x-heep@76d58ef

Update code from upstream repository https://github.com/esl-
epfl/x-heep.git to revision 76d58efe7b9dec0723c1cb9aaf8ad76ad6c85373

* Update ci (esl-epfl/x-heep#454) (Luigi Giuffrida)
* fix num of FPGAs in README (Davide Schiavone)
* Porting Ultrascale ZCU104 board (esl-epfl/x-heep#435) (jmiranda)
* Add absolute path to `CMakeLists.txt` match statements (esl-
  epfl/x-heep#469) (Michele Caon)
* add SystemC example (esl-epfl/x-heep#443) (Davide Schiavone)
* Structs multireg fix (esl-epfl/x-heep#466) (Stefano Albini)
* add Coremark and update cv32e40p (esl-epfl/x-heep#465) (Davide
  Schiavone)
* add tiled matmul (esl-epfl/x-heep#464) (Davide Schiavone)
* fix software errors/warnings (esl-epfl/x-heep#462) (Davide
  Schiavone)
* add xcelium support (esl-epfl/x-heep#452) (Davide Schiavone)
* Add matmul example (esl-epfl/x-heep#461) (Davide Schiavone)
* fix typo in debug_ss (esl-epfl/x-heep#460) (Luigi Giuffrida)
* update riscv_dbg (esl-epfl/x-heep#230) (Davide Schiavone)
* Fix esl-epfl/x-heep#430 (esl-epfl/x-heep#459) (David Mallasén
  Quintana)
* fix esl-epfl/x-heep#447 (esl-epfl/x-heep#453) (Davide Schiavone)
* fix typo (esl-epfl/x-heep#458) (Luigi Giuffrida)
* add OpenOCD BSCAN configuration file  (esl-epfl/x-heep#457) (Luis
  Waucquez)
* Removed repeated code in dma hal (esl-epfl/x-heep#456) (Juan-n-only)
* Fix linker script generation (esl-epfl/x-heep#451) (Luigi Giuffrida)
* Add a target to the Makefile to directly program the FPGA (esl-
  epfl/x-heep#450) (Luigi Giuffrida)
* [hw/sw] update flash load linker script, data_interleaved and
  data_flash_only sections (esl-epfl/x-heep#399) (Davide Schiavone)
* add simple accelerator example (esl-epfl/x-heep#446) (Davide
  Schiavone)
* change python format for Bootrom (esl-epfl/x-heep#442) (Davide
  Schiavone)
* fix memset bug (esl-epfl/x-heep#439) (Mattia Consani)
* update cv32e40px with dual-read support (esl-epfl/x-heep#441)
  (Davide Schiavone)
* Added X-HEEP Reference. (esl-epfl/x-heep#440) (Simone Machetti)
* add w25q128 flash BSP (esl-epfl/x-heep#433) (Mattia Consani)
* removed FEMU (esl-epfl/x-heep#437) (Simone Machetti)
* update cve2 (esl-epfl/x-heep#284) (Davide Schiavone)
* porting X-HEEP to the nexys FPGA (esl-epfl/x-heep#432) (Davide
  Schiavone)
* Add standard and quad write functionality to flash model (esl-
  epfl/x-heep#426) (Mattia Consani)
* revert 🐛 introduced in last revendor of iceprog (davide
  schiavone)
* Add `example_spi_host_quadIO`  (esl-epfl/x-heep#401) (Mattia
  Consani)
* fix minimal cfg with stack and heap size (esl-epfl/x-heep#431)
  (Davide Schiavone)
* Update verible url (esl-epfl/x-heep#428) (David Mallasén Quintana)
* expose DMA slots externally + external FIFO example (esl-
  epfl/x-heep#417) (grinningmosfet)
* Updated the documentation on how to add external interrupts (esl-
  epfl/x-heep#427) (Juan-n-only)
* add citation in readme (Davide Schiavone)
* Fix run-blinky-freertos command (esl-epfl/x-heep#424) (jmiranda)
* Compilation fix (esl-epfl/x-heep#422) (jmiranda)
* add stack and heap size as parameters to mcu-gen (esl-
  epfl/x-heep#419) (Luigi Giuffrida)

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>

* revendor x-heep Luigi fix

* Update esl_epfl_x_heep to LuigiGiuffrida98/x-heep@849539d

Update code from upstream repository
https://github.com/Luigi2898/x-heep.git to revision
849539ddf996926f9b679837f3bc84c0799287bb

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>

* 1. Port ZCU / 2. fix xdc file for the ZCU / 3. Fix top to include dif clk for ZCU

* added new pin and constraint files

* removed vendor modification

* Add matmul example

* Add matmul os example

* Add transformer example

* add transformer example

* reduced transformer example

* adapt minimal cfg for the cgra

* revendorizing oe-cgra

* revendorizing x-heep

* fix makefile and .core files

* Fixing .core for heepsilon

* Fixing .core for heepsilon: adding parameters

* Fixing .core for heepsilon: adding parameters v2

* Update .core and xheep vendor

* Re-vendorizing x-heep to last commit

* Updating HEEPsilon to the final version, plus fixing CGRA memory generation conflicts (generate_sram_...tcl(s))

* deleting fpga xheep link

* revendorizing x-heep to fix ci issues

* revendorizing x-heep and cgra to fix ci issues

* revendorizing x-heep and cgra to fix ci issues

---------

Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>
Co-authored-by: mbelda <11842513+mbelda@users.noreply.github.com>
Co-authored-by: Miranda Calero José Angel <jamirand@eslsrv11.intranet.epfl.ch>
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make an example to use the QSPI to read from flash check dummy latency in QSPI mode
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