Porting Ultrascale ZCU104 board #435

JoseCalero · 2023-12-18T15:07:47Z

- For the Makefile within the SW folder, the wildcard was not behaving as expected for GNU make 4.3. - For the general Readme, added the verible stuff before any make, and adding an initial folder structure. This structure can be helpful for someone new to get a initial organizational sense of the project.

…TOS porting 1. Makefile doc automatisation 2. CMake 3. FreeRTOS porting (new linker tpl, new vectors.S)

- Avoid creating an extra template for freertos linker. - Modifying CMakeLists to be compliant with all apps (baremetal and freertos based) - Readme and other minor modifications

- change pin assignment to get the tricolor led working for the freertos application - Modify readme files to update with all the different commands - created a gdbInit file

No need to deal with hard-coded paths, CMake searches for you! :)

remove some comments add additional command to directly run blinky freertos

davideschiavone · 2023-12-19T09:58:14Z

@JoseCalero, please also update the README

* Fixed GPIO vendorization. * Removed constraints file for ZCU104. * Updated FPGA wrapper for ZCU104. * Added sw target for ZCU104. * Updated clk wizard script. * Updated pin assignment.

JoseCalero · 2024-01-05T11:10:23Z

@davideschiavone do you know why the Vendor Up-to-Date check is failing? it is indicating smthng about the iceprog, but did not investigate further

davideschiavone · 2024-01-05T11:51:31Z

it

@davideschiavone do you know why the Vendor Up-to-Date check is failing? it is indicating smthng about the iceprog, but did not investigate further

you modified the hw/vendor/pulp_platform_gpio.core file, you have to modify its repository and revendor, or add it in the patch

hw/fpga/constraints/pynq-z2/pin_assign.xdc

JoseCalero · 2024-01-19T14:59:00Z

@simone-machetti did you already test it on the nexys and pynq? :)

JoseCalero · 2024-02-27T13:42:23Z

@simone-machetti we need to un-block this as there are people who need it :)
Can we see and solve what is happening with the pynq?

Update code from upstream repository https://github.com/esl- epfl/x-heep.git to revision 76d58efe7b9dec0723c1cb9aaf8ad76ad6c85373 * Update ci (esl-epfl/x-heep#454) (Luigi Giuffrida) * fix num of FPGAs in README (Davide Schiavone) * Porting Ultrascale ZCU104 board (esl-epfl/x-heep#435) (jmiranda) * Add absolute path to `CMakeLists.txt` match statements (esl- epfl/x-heep#469) (Michele Caon) * add SystemC example (esl-epfl/x-heep#443) (Davide Schiavone) * Structs multireg fix (esl-epfl/x-heep#466) (Stefano Albini) * add Coremark and update cv32e40p (esl-epfl/x-heep#465) (Davide Schiavone) * add tiled matmul (esl-epfl/x-heep#464) (Davide Schiavone) * fix software errors/warnings (esl-epfl/x-heep#462) (Davide Schiavone) * add xcelium support (esl-epfl/x-heep#452) (Davide Schiavone) * Add matmul example (esl-epfl/x-heep#461) (Davide Schiavone) * fix typo in debug_ss (esl-epfl/x-heep#460) (Luigi Giuffrida) * update riscv_dbg (esl-epfl/x-heep#230) (Davide Schiavone) * Fix esl-epfl/x-heep#430 (esl-epfl/x-heep#459) (David Mallasén Quintana) * fix esl-epfl/x-heep#447 (esl-epfl/x-heep#453) (Davide Schiavone) * fix typo (esl-epfl/x-heep#458) (Luigi Giuffrida) * add OpenOCD BSCAN configuration file (esl-epfl/x-heep#457) (Luis Waucquez) * Removed repeated code in dma hal (esl-epfl/x-heep#456) (Juan-n-only) * Fix linker script generation (esl-epfl/x-heep#451) (Luigi Giuffrida) * Add a target to the Makefile to directly program the FPGA (esl- epfl/x-heep#450) (Luigi Giuffrida) * [hw/sw] update flash load linker script, data_interleaved and data_flash_only sections (esl-epfl/x-heep#399) (Davide Schiavone) * add simple accelerator example (esl-epfl/x-heep#446) (Davide Schiavone) * change python format for Bootrom (esl-epfl/x-heep#442) (Davide Schiavone) * fix memset bug (esl-epfl/x-heep#439) (Mattia Consani) * update cv32e40px with dual-read support (esl-epfl/x-heep#441) (Davide Schiavone) * Added X-HEEP Reference. (esl-epfl/x-heep#440) (Simone Machetti) * add w25q128 flash BSP (esl-epfl/x-heep#433) (Mattia Consani) * removed FEMU (esl-epfl/x-heep#437) (Simone Machetti) * update cve2 (esl-epfl/x-heep#284) (Davide Schiavone) * porting X-HEEP to the nexys FPGA (esl-epfl/x-heep#432) (Davide Schiavone) * Add standard and quad write functionality to flash model (esl- epfl/x-heep#426) (Mattia Consani) * revert 🐛 introduced in last revendor of iceprog (davide schiavone) * Add `example_spi_host_quadIO` (esl-epfl/x-heep#401) (Mattia Consani) * fix minimal cfg with stack and heap size (esl-epfl/x-heep#431) (Davide Schiavone) * Update verible url (esl-epfl/x-heep#428) (David Mallasén Quintana) * expose DMA slots externally + external FIFO example (esl- epfl/x-heep#417) (grinningmosfet) * Updated the documentation on how to add external interrupts (esl- epfl/x-heep#427) (Juan-n-only) * add citation in readme (Davide Schiavone) * Fix run-blinky-freertos command (esl-epfl/x-heep#424) (jmiranda) * Compilation fix (esl-epfl/x-heep#422) (jmiranda) * add stack and heap size as parameters to mcu-gen (esl- epfl/x-heep#419) (Luigi Giuffrida) Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com>

* Porting Ultrascale ZCU104 board (esl-epfl#435) Porting for Ultrascale * fix num of FPGAs in README * Update ci (esl-epfl#454) docker image integration plus CI update * Fix cmake error (esl-epfl#473) * Fix edit that breaks external applications * Fix MATCH string * Consider entire path when matching `PROJECT` as well - prevent build from failing if any part of the path includes `${PROJECT}` (e.g., the name of one of the applications. * Restrict regular expression on `main` as well --------- Co-authored-by: Michele Caon <st.miky77@gmail.com> --------- Co-authored-by: Davide Schiavone <davide@openhwgroup.org> Co-authored-by: Luigi Giuffrida <32927727+Luigi2898@users.noreply.github.com> Co-authored-by: Michele Caon <st.miky77@gmail.com>

* fixes on sw for interleaved memory * revendor x-heep * Update esl_epfl_x_heep to esl-epfl/x-heep@76d58ef Update code from upstream repository https://github.com/esl- epfl/x-heep.git to revision 76d58efe7b9dec0723c1cb9aaf8ad76ad6c85373 * Update ci (esl-epfl/x-heep#454) (Luigi Giuffrida) * fix num of FPGAs in README (Davide Schiavone) * Porting Ultrascale ZCU104 board (esl-epfl/x-heep#435) (jmiranda) * Add absolute path to `CMakeLists.txt` match statements (esl- epfl/x-heep#469) (Michele Caon) * add SystemC example (esl-epfl/x-heep#443) (Davide Schiavone) * Structs multireg fix (esl-epfl/x-heep#466) (Stefano Albini) * add Coremark and update cv32e40p (esl-epfl/x-heep#465) (Davide Schiavone) * add tiled matmul (esl-epfl/x-heep#464) (Davide Schiavone) * fix software errors/warnings (esl-epfl/x-heep#462) (Davide Schiavone) * add xcelium support (esl-epfl/x-heep#452) (Davide Schiavone) * Add matmul example (esl-epfl/x-heep#461) (Davide Schiavone) * fix typo in debug_ss (esl-epfl/x-heep#460) (Luigi Giuffrida) * update riscv_dbg (esl-epfl/x-heep#230) (Davide Schiavone) * Fix esl-epfl/x-heep#430 (esl-epfl/x-heep#459) (David Mallasén Quintana) * fix esl-epfl/x-heep#447 (esl-epfl/x-heep#453) (Davide Schiavone) * fix typo (esl-epfl/x-heep#458) (Luigi Giuffrida) * add OpenOCD BSCAN configuration file (esl-epfl/x-heep#457) (Luis Waucquez) * Removed repeated code in dma hal (esl-epfl/x-heep#456) (Juan-n-only) * Fix linker script generation (esl-epfl/x-heep#451) (Luigi Giuffrida) * Add a target to the Makefile to directly program the FPGA (esl- epfl/x-heep#450) (Luigi Giuffrida) * [hw/sw] update flash load linker script, data_interleaved and data_flash_only sections (esl-epfl/x-heep#399) (Davide Schiavone) * add simple accelerator example (esl-epfl/x-heep#446) (Davide Schiavone) * change python format for Bootrom (esl-epfl/x-heep#442) (Davide Schiavone) * fix memset bug (esl-epfl/x-heep#439) (Mattia Consani) * update cv32e40px with dual-read support (esl-epfl/x-heep#441) (Davide Schiavone) * Added X-HEEP Reference. (esl-epfl/x-heep#440) (Simone Machetti) * add w25q128 flash BSP (esl-epfl/x-heep#433) (Mattia Consani) * removed FEMU (esl-epfl/x-heep#437) (Simone Machetti) * update cve2 (esl-epfl/x-heep#284) (Davide Schiavone) * porting X-HEEP to the nexys FPGA (esl-epfl/x-heep#432) (Davide Schiavone) * Add standard and quad write functionality to flash model (esl- epfl/x-heep#426) (Mattia Consani) * revert 🐛 introduced in last revendor of iceprog (davide schiavone) * Add `example_spi_host_quadIO` (esl-epfl/x-heep#401) (Mattia Consani) * fix minimal cfg with stack and heap size (esl-epfl/x-heep#431) (Davide Schiavone) * Update verible url (esl-epfl/x-heep#428) (David Mallasén Quintana) * expose DMA slots externally + external FIFO example (esl- epfl/x-heep#417) (grinningmosfet) * Updated the documentation on how to add external interrupts (esl- epfl/x-heep#427) (Juan-n-only) * add citation in readme (Davide Schiavone) * Fix run-blinky-freertos command (esl-epfl/x-heep#424) (jmiranda) * Compilation fix (esl-epfl/x-heep#422) (jmiranda) * add stack and heap size as parameters to mcu-gen (esl- epfl/x-heep#419) (Luigi Giuffrida) Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com> * revendor x-heep Luigi fix * Update esl_epfl_x_heep to LuigiGiuffrida98/x-heep@849539d Update code from upstream repository https://github.com/Luigi2898/x-heep.git to revision 849539ddf996926f9b679837f3bc84c0799287bb Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com> * 1. Port ZCU / 2. fix xdc file for the ZCU / 3. Fix top to include dif clk for ZCU * added new pin and constraint files * removed vendor modification * Add matmul example * Add matmul os example * Add transformer example * add transformer example * reduced transformer example * adapt minimal cfg for the cgra * revendorizing oe-cgra * revendorizing x-heep * fix makefile and .core files * Fixing .core for heepsilon * Fixing .core for heepsilon: adding parameters * Fixing .core for heepsilon: adding parameters v2 * Update .core and xheep vendor * Re-vendorizing x-heep to last commit * Updating HEEPsilon to the final version, plus fixing CGRA memory generation conflicts (generate_sram_...tcl(s)) * deleting fpga xheep link --------- Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com> Co-authored-by: mbelda <11842513+mbelda@users.noreply.github.com> Co-authored-by: Miranda Calero José Angel <jamirand@eslsrv11.intranet.epfl.ch>

* fixes on sw for interleaved memory * revendor x-heep * Update esl_epfl_x_heep to esl-epfl/x-heep@76d58ef Update code from upstream repository https://github.com/esl- epfl/x-heep.git to revision 76d58efe7b9dec0723c1cb9aaf8ad76ad6c85373 * Update ci (esl-epfl/x-heep#454) (Luigi Giuffrida) * fix num of FPGAs in README (Davide Schiavone) * Porting Ultrascale ZCU104 board (esl-epfl/x-heep#435) (jmiranda) * Add absolute path to `CMakeLists.txt` match statements (esl- epfl/x-heep#469) (Michele Caon) * add SystemC example (esl-epfl/x-heep#443) (Davide Schiavone) * Structs multireg fix (esl-epfl/x-heep#466) (Stefano Albini) * add Coremark and update cv32e40p (esl-epfl/x-heep#465) (Davide Schiavone) * add tiled matmul (esl-epfl/x-heep#464) (Davide Schiavone) * fix software errors/warnings (esl-epfl/x-heep#462) (Davide Schiavone) * add xcelium support (esl-epfl/x-heep#452) (Davide Schiavone) * Add matmul example (esl-epfl/x-heep#461) (Davide Schiavone) * fix typo in debug_ss (esl-epfl/x-heep#460) (Luigi Giuffrida) * update riscv_dbg (esl-epfl/x-heep#230) (Davide Schiavone) * Fix esl-epfl/x-heep#430 (esl-epfl/x-heep#459) (David Mallasén Quintana) * fix esl-epfl/x-heep#447 (esl-epfl/x-heep#453) (Davide Schiavone) * fix typo (esl-epfl/x-heep#458) (Luigi Giuffrida) * add OpenOCD BSCAN configuration file (esl-epfl/x-heep#457) (Luis Waucquez) * Removed repeated code in dma hal (esl-epfl/x-heep#456) (Juan-n-only) * Fix linker script generation (esl-epfl/x-heep#451) (Luigi Giuffrida) * Add a target to the Makefile to directly program the FPGA (esl- epfl/x-heep#450) (Luigi Giuffrida) * [hw/sw] update flash load linker script, data_interleaved and data_flash_only sections (esl-epfl/x-heep#399) (Davide Schiavone) * add simple accelerator example (esl-epfl/x-heep#446) (Davide Schiavone) * change python format for Bootrom (esl-epfl/x-heep#442) (Davide Schiavone) * fix memset bug (esl-epfl/x-heep#439) (Mattia Consani) * update cv32e40px with dual-read support (esl-epfl/x-heep#441) (Davide Schiavone) * Added X-HEEP Reference. (esl-epfl/x-heep#440) (Simone Machetti) * add w25q128 flash BSP (esl-epfl/x-heep#433) (Mattia Consani) * removed FEMU (esl-epfl/x-heep#437) (Simone Machetti) * update cve2 (esl-epfl/x-heep#284) (Davide Schiavone) * porting X-HEEP to the nexys FPGA (esl-epfl/x-heep#432) (Davide Schiavone) * Add standard and quad write functionality to flash model (esl- epfl/x-heep#426) (Mattia Consani) * revert 🐛 introduced in last revendor of iceprog (davide schiavone) * Add `example_spi_host_quadIO` (esl-epfl/x-heep#401) (Mattia Consani) * fix minimal cfg with stack and heap size (esl-epfl/x-heep#431) (Davide Schiavone) * Update verible url (esl-epfl/x-heep#428) (David Mallasén Quintana) * expose DMA slots externally + external FIFO example (esl- epfl/x-heep#417) (grinningmosfet) * Updated the documentation on how to add external interrupts (esl- epfl/x-heep#427) (Juan-n-only) * add citation in readme (Davide Schiavone) * Fix run-blinky-freertos command (esl-epfl/x-heep#424) (jmiranda) * Compilation fix (esl-epfl/x-heep#422) (jmiranda) * add stack and heap size as parameters to mcu-gen (esl- epfl/x-heep#419) (Luigi Giuffrida) Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com> * revendor x-heep Luigi fix * Update esl_epfl_x_heep to LuigiGiuffrida98/x-heep@849539d Update code from upstream repository https://github.com/Luigi2898/x-heep.git to revision 849539ddf996926f9b679837f3bc84c0799287bb Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com> * 1. Port ZCU / 2. fix xdc file for the ZCU / 3. Fix top to include dif clk for ZCU * added new pin and constraint files * removed vendor modification * Add matmul example * Add matmul os example * Add transformer example * add transformer example * reduced transformer example * adapt minimal cfg for the cgra * revendorizing oe-cgra * revendorizing x-heep * fix makefile and .core files * Fixing .core for heepsilon * Fixing .core for heepsilon: adding parameters * Fixing .core for heepsilon: adding parameters v2 * Update .core and xheep vendor * Re-vendorizing x-heep to last commit * Updating HEEPsilon to the final version, plus fixing CGRA memory generation conflicts (generate_sram_...tcl(s)) * deleting fpga xheep link * revendorizing x-heep to fix ci issues * revendorizing x-heep and cgra to fix ci issues * revendorizing x-heep and cgra to fix ci issues --------- Signed-off-by: mbelda <11842513+mbelda@users.noreply.github.com> Co-authored-by: mbelda <11842513+mbelda@users.noreply.github.com> Co-authored-by: Miranda Calero José Angel <jamirand@eslsrv11.intranet.epfl.ch>

JoseCalero and others added 30 commits August 11, 2022 16:56

Merge branch 'main' into main

135c9d3

updating with upstream main

4945c02

fix uart pins and spi flash memory size

059e67c

Merge remote-tracking branch 'upstream/main' into main

058a58b

Added macro for uart baudrate by default based on the target

2551109

Merge remote-tracking branch 'upstream/main' into main

57e2303

linker modification for the flash (.data section being in wrong place)

d1cc7d2

Merge remote-tracking branch 'upstream/main' into main

e7446ba

Merge branch 'esl-epfl:main' into main

c5599f3

Merge remote-tracking branch 'upstream/main' into main

aa1e5a4

Merge remote-tracking branch 'upstream/main' into main

bd75bfa

Merge remote-tracking branch 'upstream/main' into main

e504411

Added cmake + cpp with the same upstream folder structure

29dca2d

Merge remote-tracking branch 'upstream/main' into main

0947793

Update + minor changes cmake

2351ef9

Major commit includding Makefile doc automatisation, CMake, and FreeR…

b336f9d

…TOS porting 1. Makefile doc automatisation 2. CMake 3. FreeRTOS porting (new linker tpl, new vectors.S)

Merge remote-tracking branch 'upstream/main'

e339eaa

Minor permission changes

9a25bf8

Update README.md

f9a9629

Minor CMake, linker, freeRTOS, and Makefile modifications

58e43e4

- Avoid creating an extra template for freertos linker. - Modifying CMakeLists to be compliant with all apps (baremetal and freertos based) - Readme and other minor modifications

Merge remote-tracking branch 'upstream/main' into main

1238aa4

FPGA testing + commands automatizations

2845068

- change pin assignment to get the tricolor led working for the freertos application - Modify readme files to update with all the different commands - created a gdbInit file

Merge remote-tracking branch 'upstream/main' into main

e2a462a

Updating readme and app for freertos

052007b

CMake auto backend

db39d42

No need to deal with hard-coded paths, CMake searches for you! :)

fix CMake include list

8cb859b

minor update

5d47c35

remove some comments add additional command to directly run blinky freertos

Merge remote-tracking branch 'upstream/main' into main

48065d9

Merge remote-tracking branch 'upstream/main' into main

1eae6f8

JoseCalero and others added 3 commits October 31, 2023 15:46

Merge branch 'esl-epfl:main' into main

3f94193

Merge branch 'esl-epfl:main' into main

cfbfbf5

Porting Ultrascale ZCU104

7a91b62

JoseCalero requested review from davideschiavone and simone-machetti December 18, 2023 15:07

Miranda Calero José Angel added 2 commits December 19, 2023 02:15

Fix some typos, Plus adding initial constraint file for ZCU104

cc752bd

Fix white space

66eada4

Fix xdc files

557fc83

simone-machetti mentioned this pull request Jan 3, 2024

Pull Request Review: X-HEEP on ZCU104 JoseCalero/x-heep#1

Merged

Pull Request Review: X-HEEP on ZCU104 (#1)

60e5cc9

* Fixed GPIO vendorization. * Removed constraints file for ZCU104. * Updated FPGA wrapper for ZCU104. * Added sw target for ZCU104. * Updated clk wizard script. * Updated pin assignment.

JoseCalero added 2 commits January 5, 2024 13:48

Update esl_epfl_zcu104_board_files.lock.hjson

0e19255

Update esl_epfl_zcu104_board_files.vendor.hjson

58f7c7c

davideschiavone requested changes Jan 5, 2024

View reviewed changes

hw/fpga/constraints/pynq-z2/pin_assign.xdc Outdated Show resolved Hide resolved

hw/fpga/constraints/pynq-z2/pin_assign.xdc Outdated Show resolved Hide resolved

JoseCalero and others added 2 commits January 5, 2024 19:11

update board files and re-vendor

8337662

Few fixes. (#2)

5a56461

Merge branch 'main' into main

04128ba

JoseCalero marked this pull request as ready for review March 6, 2024 17:03

JoseCalero added 3 commits March 6, 2024 18:40

fix pynq file

4054fbd

update readme and makefile

b43f2c2

Merge branch 'main' into main

ad0ec7f

JoseCalero merged commit 3bf7753 into esl-epfl:main Mar 8, 2024
3 checks passed

Provide feedback

Saved searches

Use saved searches to filter your results more quickly

Porting Ultrascale ZCU104 board #435

Porting Ultrascale ZCU104 board #435

JoseCalero commented Dec 18, 2023 •

edited

Loading

davideschiavone commented Dec 19, 2023

JoseCalero commented Jan 5, 2024

davideschiavone commented Jan 5, 2024

JoseCalero commented Jan 19, 2024

JoseCalero commented Feb 27, 2024

Porting Ultrascale ZCU104 board #435

Porting Ultrascale ZCU104 board #435

Conversation

JoseCalero commented Dec 18, 2023 • edited Loading

davideschiavone commented Dec 19, 2023

JoseCalero commented Jan 5, 2024

davideschiavone commented Jan 5, 2024

JoseCalero commented Jan 19, 2024

JoseCalero commented Feb 27, 2024

JoseCalero commented Dec 18, 2023 •

edited

Loading