[SYCL] Fix link to ESIMD tests #2736
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These tests can be treated as ESIMD code samples
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pvchupin
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alexbatashev
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* upstream/sycl: [SYCL] Move tests with dependencies to on-device directory (intel#2732) [SYCL][Test] Remove leftovers for FPGA archives (intel#2735) [SYCL][NFC] Extend ABI tests to cover device code (intel#2725) [SYCL] Fix link to ESIMD tests (intel#2736) Added the SYCL_INTEL_mem_channel_property extension specification (intel#2688) [SYCL] Add support for new FPGA loop attribute nofusion (intel#2715) [SYCL] Remove host-task-dependency test added to llvm-test-suite (intel#2720) [SYCL] Remove warning about SYCL_EXTERNAL with pointers (intel#2722) [SYCL] dot_product support. (intel#2609) [SYCL][PI][L0] Fix a problem with kernels and programs destruction while they can be used (intel#2710) [SYCL] Fix the check for read-only host pointer during memobj creation (intel#2697)
jsji
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Oct 10, 2024
…nce (#2736) This PR partially fixes issue #2702 in the part that is responsible for SPIR-V to LLVM IR translation. Namely, this PR ensures that all PHI nodes of a Function has the number of incoming blocks matching block's predecessor count. When a PHI node doesn't conform to this rule, this PR inserts missing number of (Value, Basic Block) pairs to make the PHI node valid. Another problem from #2702, that is violation of the requirement to OpPhi's to have exactly one Parent ID operand for each parent block of the current block in the CFG in the output SPIR-V code, is out of scope of this PR. Original commit: KhronosGroup/SPIRV-LLVM-Translator@7d7f946dbd51236
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These tests can be treated as ESIMD code samples