[RFC][Sim] Add triggered simulation procedures

include/circt/Dialect/Sim/SimOps.h

@@ -14,6 +14,7 @@
 #define CIRCT_DIALECT_SIM_SIMOPS_H
 
 #include "circt/Dialect/HW/HWOpInterfaces.h"
+#include "circt/Dialect/HW/HWOps.h"
 #include "circt/Dialect/Seq/SeqDialect.h"
 #include "circt/Dialect/Seq/SeqTypes.h"
 #include "circt/Dialect/Sim/SimDialect.h"

include/circt/Dialect/Sim/SimOps.td

@@ -13,6 +13,7 @@
 #ifndef CIRCT_DIALECT_SIM_SIMOPS_TD
 #define CIRCT_DIALECT_SIM_SIMOPS_TD
 
+include "circt/Dialect/HW/HWEnums.td"
 include "circt/Dialect/HW/HWOpInterfaces.td"
 include "circt/Dialect/HW/HWTypes.td"
 include "circt/Dialect/Seq/SeqTypes.td"
@@ -21,7 +22,9 @@ include "circt/Dialect/Sim/SimTypes.td"
 include "mlir/Interfaces/FunctionInterfaces.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
+include "mlir/IR/BuiltinAttributes.td"
 include "mlir/IR/OpAsmInterface.td"
+include "mlir/IR/RegionKindInterface.td"
 
 class SimOp<string mnemonic, list<Trait> traits = []> :
     Op<SimDialect, mnemonic, traits>;
@@ -359,4 +362,115 @@ def PrintFormattedProcOp : SimOp<"proc.print"> {
   let assemblyFormat = "$input attr-dict";
 }
 
+// --- Trigger Ops ---
+
+def OnEdgeOp : SimOp<"on_edge", [
+  Pure,
+  DeclareOpInterfaceMethods<InferTypeOpInterface, ["inferReturnTypes"]>
+]> {
+  let summary = "Create a trigger that gets invoked on a clock edge event.";
+  let arguments = (ins ClockType:$clock, EventControlAttr:$event);
+  let results = (outs EdgeTriggerType:$result);
+  let assemblyFormat = "$event $clock attr-dict";
+}
+
+def OnInitOp : SimOp<"on_init", [Pure]> {
+  let summary =
+    "Create a trigger that gets invoked at the start of simulation.";
+  let results = (outs InitTriggerType:$result);
+  let assemblyFormat = "attr-dict";
+}
+
+def TriggerSequenceOp : SimOp<"trigger_sequence", [
+  DeclareOpInterfaceMethods<InferTypeOpInterface, ["inferReturnTypes"]>
+]> {
+  let summary = "Derive a sequence of triggers from a parent trigger.";
+  let description = [{
+   Creates a series of sequenced triggers.
+   The first resulting trigger is invoked when the parent trigger is invoked.
+   The subsequent triggers are invoked after all preceeding triggers
+   have completed. The operation completes after all result triggers have
+   completed.
+  }];
+  let arguments = (ins AnyTriggerType:$parent, UI32Attr:$length);
+  let results = (outs Variadic<AnyTriggerType>:$triggers);
+  let assemblyFormat =
+    "$parent `,` $length attr-dict `:` qualified(type($parent))";
+  let hasFolder = true;
+  let hasCanonicalizeMethod = true;
+  let hasVerifier = true;
+}
+
+def YieldSeqOp : SimOp<"yield_seq",[
+  Terminator, HasParent<"circt::sim::TriggeredOp">
+]> {
+  let summary =
+    "Yield results from a triggered region with sequential semantics.";
+  let description = [{
+    Terminates a triggered region and produces the given list of values.
+    The results only become visible after all triggers and register updates
+    occuring on the same event as the parent operation have completed.
+    E.g., the following snippet produces a counter that increments on every
+    rising edge of '%clk':
+    ```
+    %posedge = sim.on_edge posedge %clk
+    %counter = sim.triggered (%counter) on %posedge tieoff [0 : i8] {
+      ^bb0(%arg0: i8):
+      %cst1 = hw.constant 1 : i8
+      %inc = comb.add bin %arg0, %cst1 : i8
+      sim.yield_seq %inc : i8
+    } : (i8) -> (i8)
+    ```
+  }];
+  let arguments = (ins Variadic<AnyType>:$inputs);
+  let assemblyFormat = "($inputs^ `:` qualified(type($inputs)))? attr-dict";
+  let builders = [OpBuilder<(ins), "build($_builder, $_state, {});">];
+}
+
+def TriggeredOp : SimOp<"triggered", [
+  IsolatedFromAbove,
+  RegionKindInterface,
+  RecursiveMemoryEffects,
+  RecursivelySpeculatable,
+  SingleBlockImplicitTerminator<"sim::YieldSeqOp">,
+  HasParent<"circt::hw::HWModuleOp">
+]> {
+  let summary =
+    "Defines a procedure invoked on a given trigger and condition.";
+  let description = [{
+    Creates a procedural region which is invoked on a given trigger.
+    The body region must complete without 'consuming' simulation time. It
+    may not run indefinitely or wait for any simulation event. It is allowed to
+    have side-effects and produce results.
+    For every result a 'tieoff' constant must be provided. It specifies the
+    respective result's value before the body is first invoked.
+    For non-simulation flows the results are replaced by their tie-off values.
+  }];
+  let arguments = (ins AnyTriggerType:$trigger,
+                       Variadic<AnyType>:$inputs,
+                       OptionalAttr<TypedArrayAttrBase<
+                         TypedAttrInterface, "Tie-off constants">>:$tieoffs
+                  );
+  let results = (outs Variadic<AnyType>);
+  let regions = (region SizedRegion<1>:$body);
+
+  let assemblyFormat = [{
+    ` ` `(` $inputs `)`
+    `on` ` ` `(` $trigger `:` qualified(type($trigger)) `)`
+    (`tieoff` $tieoffs^)? attr-dict-with-keyword
+    $body
+    `:` functional-type($inputs, results)
+  }];
+
+  let extraClassDeclaration = [{
+    // Implement RegionKindInterface.
+    static RegionKind getRegionKind(unsigned index) {
+     return RegionKind::SSACFG;
+    }
+  }];
+
+  let hasVerifier = true;
+  let hasCanonicalizeMethod = true;
+}
+
 #endif // CIRCT_DIALECT_SIM_SIMOPS_TD

include/circt/Dialect/Sim/SimTypes.h

@@ -12,6 +12,8 @@
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Types.h"
 
+#include "circt/Dialect/HW/HWEnums.h"
+
 #define GET_TYPEDEF_CLASSES
 #include "circt/Dialect/Sim/SimTypes.h.inc"
 

include/circt/Dialect/Sim/SimTypes.td

@@ -26,4 +26,19 @@ def FormatStringType : SimTypeDef<"FormatString"> {
   }];
 }
 
+
+def EdgeTriggerType : SimTypeDef<"EdgeTrigger"> {
+  let summary = "Trigger derived from an edge event.";
+  let parameters = (ins "::circt::hw::EventControl":$edgeEvent);
+  let mnemonic = "trigger.edge";
+  let assemblyFormat = "`<` $edgeEvent `>`";
+}
+
+def InitTriggerType : SimTypeDef<"InitTrigger"> {
+  let summary = "Trigger derived from the simulation start event.";
+  let mnemonic = "trigger.init";
+}
+
+def AnyTriggerType : AnyTypeOf<[EdgeTriggerType, InitTriggerType]>;
+
 #endif // CIRCT_DIALECT_SIM_SIMTYPES_TD

lib/Dialect/Sim/SimDialect.cpp

@@ -11,6 +11,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "circt/Dialect/Sim/SimDialect.h"
+#include "circt/Dialect/HW/HWDialect.h"
 #include "circt/Dialect/HW/HWOps.h"
 #include "circt/Dialect/Sim/SimOps.h"
 #include "mlir/IR/Builders.h"
@@ -40,6 +41,12 @@ Operation *SimDialect::materializeConstant(::mlir::OpBuilder &builder,
                                            ::mlir::Type type,
                                            ::mlir::Location loc) {
 
+  // Delegate non 'sim' types to the HW dialect materializer.
+  if (!isa<SimDialect>(type.getDialect()))
+    return builder.getContext()
+        ->getLoadedDialect<hw::HWDialect>()
+        ->materializeConstant(builder, value, type, loc);
+
   if (auto fmtStrType = llvm::dyn_cast<FormatStringType>(type))
     return builder.create<FormatLitOp>(loc, fmtStrType,
                                        llvm::cast<StringAttr>(value));

lib/Dialect/Sim/SimOps.cpp

@@ -397,6 +397,198 @@ LogicalResult PrintFormattedProcOp::canonicalize(PrintFormattedProcOp op,
   return failure();
 }
 
+// --- OnEdgeOp ---
+
+LogicalResult OnEdgeOp::inferReturnTypes(
+    MLIRContext *context, std::optional<Location> location, ValueRange operands,
+    DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
+    SmallVectorImpl<Type> &inferredReturnTypes) {
+  auto eventAttr = properties.as<OnEdgeOp::Properties *>()->getEvent();
+  inferredReturnTypes.emplace_back(
+      EdgeTriggerType::get(context, eventAttr.getValue()));
+  return success();
+}
+
+// --- TriggeredOp ---
+
+LogicalResult TriggeredOp::verify() {
+  if (getNumResults() > 0 && !getTieoffs())
+    return emitError("Tie-off constants must be provided for all results.");
+  auto numTieoffs = !getTieoffs() ? 0 : getTieoffsAttr().size();
+  if (numTieoffs != getNumResults())
+    return emitError(
+        "Number of tie-off constants does not match number of results.");
+  if (numTieoffs == 0)
+    return success();
+  unsigned idx = 0;
+  bool failed = false;
+  for (const auto &[res, tieoff] :
+       llvm::zip(getResultTypes(), getTieoffsAttr())) {
+    if (res != cast<TypedAttr>(tieoff).getType()) {
+      emitError("Tie-off type does not match for result at index " +
+                Twine(idx));
+      failed = true;
+    }
+    ++idx;
+  }
+  return success(!failed);
+}
+
+LogicalResult TriggeredOp::canonicalize(TriggeredOp op,
+                                        PatternRewriter &rewriter) {
+  if (op.getNumResults() > 0)
+    return failure();
+
+  auto *bodyBlock = &op.getBodyRegion().front();
+  if (bodyBlock->without_terminator().empty()) {
+    rewriter.eraseOp(op);
+    return success();
+  }
+
+  return failure();
+}
+
+// --- TriggerSequenceOp ---
+
+LogicalResult TriggerSequenceOp::inferReturnTypes(
+    MLIRContext *context, std::optional<Location> location, ValueRange operands,
+    DictionaryAttr attributes, OpaqueProperties properties, RegionRange regions,
+    SmallVectorImpl<Type> &inferredReturnTypes) {
+  // Create N results matching the type of the parent trigger, where N is the
+  // specified length of the sequence.
+  auto lengthAttr =
+      properties.as<TriggerSequenceOp::Properties *>()->getLength();
+  uint32_t len = lengthAttr.getValue().getZExtValue();
+  Type trigType = operands.front().getType();
+  inferredReturnTypes.resize_for_overwrite(len);
+  for (size_t i = 0; i < len; ++i)
+    inferredReturnTypes[i] = trigType;
+  return success();
+}
+
+LogicalResult TriggerSequenceOp::verify() {
+  if (getLength() != getNumResults())
+    return emitOpError("specified length does not match number of results.");
+  return success();
+}
+
+LogicalResult TriggerSequenceOp::fold(FoldAdaptor adaptor,
+                                      SmallVectorImpl<OpFoldResult> &results) {
+  // Fold trivial sequences to the parent trigger.
+  if (getLength() == 1 && getResult(0) != getParent()) {
+    results.push_back(getParent());
+    return success();
+  }
+  return failure();
+}
+
+LogicalResult TriggerSequenceOp::canonicalize(TriggerSequenceOp op,
+                                              PatternRewriter &rewriter) {
+  if (op.getNumResults() == 0) {
+    rewriter.eraseOp(op);
+    return success();
+  }
+
+  // If the current op can be inlined into the parent,
+  // leave it to the parent's canonicalization.
+  if (auto parentSeq = op.getParent().getDefiningOp<TriggerSequenceOp>()) {
+    if (parentSeq == op) {
+      op.emitWarning("Recursive trigger sequence.");
+      return failure();
+    }
+    if (op.getParent().hasOneUse())
+      return failure();
+  }
+
+  auto getSingleSequenceUser = [](Value trigger) -> TriggerSequenceOp {
+    if (!trigger.hasOneUse())
+      return {};
+    return dyn_cast<TriggerSequenceOp>(trigger.use_begin()->getOwner());
+  };
+
+  // Check if there are unused results (which can be removed) or
+  // non-concurrent sub-sequences (which can be inlined).
+
+  bool canBeChanged = false;
+  for (auto res : op.getResults()) {
+    auto singleSeqUser = getSingleSequenceUser(res);
+    if (res.use_empty() || !!singleSeqUser) {
+      canBeChanged = true;
+      break;
+    }
+  }
+
+  if (!canBeChanged)
+    return failure();
+
+  // DFS for inlinable values.
+  SmallVector<Value> newResultValues;
+  SmallVector<TriggerSequenceOp> inlinedSequences;
+  llvm::SmallVector<std::pair<TriggerSequenceOp, unsigned>> sequenceOpStack;
+
+  sequenceOpStack.push_back({op, 0});
+  while (!sequenceOpStack.empty()) {
+    auto &top = sequenceOpStack.back();
+    auto currentSequence = top.first;
+    unsigned resultIndex = top.second;
+
+    while (resultIndex < currentSequence.getNumResults()) {
+      auto currentResult = currentSequence.getResult(resultIndex);
+      // Check we do not walk in a cycle.
+      if (currentResult == op.getParent()) {
+        op.emitWarning("Recursive trigger sequence.");
+        return failure();
+      }
+
+      if (auto inlinableChildSequence = getSingleSequenceUser(currentResult)) {
+        // Save the next result index to visit on the
+        // stack and put the new sequence on top.
+        top.second = resultIndex + 1;
+        sequenceOpStack.push_back({inlinableChildSequence, 0});
+        inlinedSequences.push_back(inlinableChildSequence);
+        inlinableChildSequence->dropAllReferences();
+        break;
+      }
+
+      if (!currentResult.use_empty())
+        newResultValues.push_back(currentResult);
+      resultIndex++;
+    }
+    // Pop the sequence off of the stack if we have visited all results.
+    if (resultIndex >= currentSequence.getNumResults())
+      sequenceOpStack.pop_back();
+  }
+
+  // Remove dead sequences.
+  if (newResultValues.empty()) {
+    for (auto deadSubSequence : inlinedSequences)
+      rewriter.eraseOp(deadSubSequence);
+    rewriter.eraseOp(op);
+    return success();
+  }
+
+  // Replace the current operation with a new sequence.
+  rewriter.setInsertionPoint(op);
+
+  SmallVector<Location> inlinedLocs;
+  inlinedLocs.reserve(inlinedSequences.size() + 1);
+  inlinedLocs.push_back(op.getLoc());
+  for (auto subSequence : inlinedSequences)
+    inlinedLocs.push_back(subSequence.getLoc());
+  auto fusedLoc = FusedLoc::get(op.getContext(), inlinedLocs);
+  inlinedLocs.clear();
+
+  auto newOp = rewriter.create<TriggerSequenceOp>(fusedLoc, op.getParent(),
+                                                  newResultValues.size());
+  for (auto [rval, newRes] : llvm::zip(newResultValues, newOp.getResults()))
+    rewriter.replaceAllUsesWith(rval, newRes);
+
+  for (auto deadSubSequence : inlinedSequences)
+    rewriter.eraseOp(deadSubSequence);
+  rewriter.eraseOp(op);
+  return success();
+}
+
 //===----------------------------------------------------------------------===//
 // TableGen generated logic.
 //===----------------------------------------------------------------------===//