Adjust the Arm targets in CI to reflect latest changes #147596

thejpster · 2025-10-11T23:03:13Z

Adds build of armv7a-none-eabihf (Promote armv7a-none-eabihf to Tier 2 #146522)
Adds build of armv8r-none-eabihf (Promote armv8r-none-eabihf target to Tier 2 #146520)
Drops build of armeb*-none-* (Demote both armebv7r-none-* targets. #146523)

I wasn't sure why armv7a-none-eabihf was missing from the build-manifest program, but armv8r-none-eabihf was there, as they were both Tier 3 targets up until very recently. So, I added it, but that might be wrong.

* Adds armv7a-none-eabihf (rust-lang#146522) * Adds armv8r-none-eabihf (rust-lang#146520) * Drops armeb*-none-* (rust-lang#146523)

rustbot · 2025-10-11T23:03:18Z

r? @Mark-Simulacrum

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Mark-Simulacrum · 2025-10-12T01:10:54Z

build-manifest being missed is probably just an oversight, it usually takes someone actually trying to use the target to find that kind of gap.

@bors r+ rollup=iffy

bors · 2025-10-12T01:10:56Z

📌 Commit cc96d3f has been approved by Mark-Simulacrum

It is now in the queue for this repository.

…ets, r=Mark-Simulacrum Adjust the Arm targets in CI to reflect latest changes * Adds build of `armv7a-none-eabihf` (rust-lang#146522) * Adds build of `armv8r-none-eabihf` (rust-lang#146520) * Drops build of `armeb*-none-*` (rust-lang#146523) I wasn't sure why `armv7a-none-eabihf` was missing from the build-manifest program, but `armv8r-none-eabihf` was there, as they were both Tier 3 targets up until very recently. So, I added it, but that might be wrong.

Rollup of 12 pull requests Successful merges: - #138799 (core: simplify `Extend` for tuples) - #146692 (Save x.py's help text for saving output time) - #147168 (Don't unconditionally build alloc for `no-std` targets) - #147178 ([DebugInfo] Improve formatting of MSVC enum struct variants) - #147240 (Add an ACP list item to the library tracking issue template) - #147246 (Explain not existed key in BTreeMap::split_off) - #147393 (Extract most code from `define_feedable!`) - #147495 (Update wasm-component-ld to 0.5.18) - #147503 (Fix documentation of Instant::now on mac) - #147541 (Change int-to-ptr transmute lowering back to inttoptr) - #147549 (Replace `LLVMRustContextCreate` with normal LLVM-C API calls) - #147596 (Adjust the Arm targets in CI to reflect latest changes) r? `@ghost` `@rustbot` modify labels: rollup

Zalathar · 2025-10-12T07:17:58Z

Possibly failed in rollup in dist-various-1: #147598 (comment)

@bors r-

Zalathar · 2025-10-12T07:18:07Z

@bors try jobs=dist-various-1

Adjust the Arm targets in CI to reflect latest changes try-job: dist-various-1

thejpster · 2025-10-12T08:15:14Z

build-manifest being missed is probably just an oversight, it usually takes someone actually trying to use the target to find that kind of gap.

@bors r+ rollup=iffy

Which Tier of target should be in build-manifest?

rust-bors · 2025-10-12T08:46:25Z

💔 Test for c5785df failed: CI. Failed jobs:

try - dist-various-1 (web logs, extended logs)

thejpster · 2025-10-12T08:56:02Z

cargo:warning=cc1: error: '-mfloat-abi=hard': selected processor lacks an FPU
2025-10-12T08:45:46.0994124Z
2025-10-12T08:45:46.0994203Z --- stderr
2025-10-12T08:45:46.0994322Z
2025-10-12T08:45:46.0994328Z
2025-10-12T08:45:46.0996208Z error occurred: Command "sccache" "arm-none-eabi-gcc" "-O3" "-ffunction-sections" "-fdata-sections" "-g" "-fno-omit-frame-pointer" "-mfloat-abi=hard" "-fno-builtin" "-fvisibility=hidden" "-ffreestanding" "-Werror=implicit-function-declaration" "-DCOMPILER_RT_HAS_FLOAT16" "-DVISIBILITY_HIDDEN" "-o" "/checkout/obj/build/x86_64-unknown-linux-gnu/stage1-std/armv8r-none-eabihf/release/build/compiler_builtins-aaf6c8d45d5c9d4a/out/45c91108d938afe8-absvdi2.o" "-c" "/checkout/src/llvm-project/compiler-rt/lib/builtins/absvdi2.c" with args arm-none-eabi-gcc did not execute successfully (status code exit status: 1).

right. Got to set some CFLAGS for this target. On it.

thejpster · 2025-10-12T12:55:51Z

I think I have a fix, but let me build locally and check the minors is actually good.

I wanted to pass some CLAGS to build-std but I couldn’t work out how to, so I’ll just build a whole toolchain.

Not all ARMv7-A CPUs have a double-precision FPU. So adjust the CFLAGS from `+vfpv3` (which assumes 32 double-precision registers) to `+fp` (which only assumes 16 double-precision registers).

thejpster · 2025-10-12T16:58:03Z

I was able to build libcore locally for armv7a-none-eabihf and armv8r-none-eabihf and pass the cortex-ar test suite with it. Not that it's an exhaustive test suite by any means, but it did at least pass.

Mark-Simulacrum · 2025-10-12T17:35:26Z

Should we be trying to derive the CFLAGS from the Rust (more specific?) target tuple? I see that there's a bunch of similar-looking code in cc-rs (https://github.com/rust-lang/cc-rs/blob/87e5faef33d451532dd87c144a5d3eecb04192f2/src/lib.rs#L2324) that maybe needs updating or could be reused here somehow?

@bors try jobs=dist-various-1

Adjust the Arm targets in CI to reflect latest changes try-job: dist-various-1

thejpster · 2025-10-12T18:18:32Z

Maybe the target specification should name both the default C compiler to use, but also the flags required to make that C compiler work. If not there, then it should at least be documented on the platform support pages.

rust-bors · 2025-10-12T19:07:29Z

☀️ Try build successful (CI)
Build commit: aa8ffd3 (aa8ffd394682e7ced5b7911d42ae549fb0afa75f, parent: ff6dc928c5e33ce8e65c6911a790b9efcb5ef53a)

Mark-Simulacrum · 2025-10-12T19:12:15Z

@bors r+

Maybe the target specification should name both the default C compiler to use, but also the flags required to make that C compiler work. If not there, then it should at least be documented on the platform support pages.

I think 'default' is maybe strong, but providing guidance for gcc and clang makes sense to me. Ideally that guidance is also embedded into cc-rs so most users don't need to find platform support docs.

bors · 2025-10-12T19:12:17Z

📌 Commit fef16d2 has been approved by Mark-Simulacrum

It is now in the queue for this repository.

…ets, r=Mark-Simulacrum Adjust the Arm targets in CI to reflect latest changes * Adds build of `armv7a-none-eabihf` (rust-lang#146522) * Adds build of `armv8r-none-eabihf` (rust-lang#146520) * Drops build of `armeb*-none-*` (rust-lang#146523) I wasn't sure why `armv7a-none-eabihf` was missing from the build-manifest program, but `armv8r-none-eabihf` was there, as they were both Tier 3 targets up until very recently. So, I added it, but that might be wrong.

Rollup of 11 pull requests Successful merges: - #146277 (Enable `u64` limbs in `core::num::bignum`) - #146976 (constify basic Clone impls) - #147249 (Do two passes of `handle_opaque_type_uses_next`) - #147266 (fix 2 search graph bugs) - #147468 (Implement fs api set_times and set_times_nofollow) - #147497 (`proc_macro` cleanups (3/N)) - #147594 (std: implement `pal::os::exit` for VEXos) - #147596 (Adjust the Arm targets in CI to reflect latest changes) - #147607 (GVN: Invalidate derefs at loop headers) - #147620 (Avoid redundant UB check in RangeFrom slice indexing) - #147647 (Hide vendoring and copyright in GHA group) r? `@ghost` `@rustbot` modify labels: rollup

…ets, r=Mark-Simulacrum Adjust the Arm targets in CI to reflect latest changes * Adds build of `armv7a-none-eabihf` (rust-lang#146522) * Adds build of `armv8r-none-eabihf` (rust-lang#146520) * Drops build of `armeb*-none-*` (rust-lang#146523) I wasn't sure why `armv7a-none-eabihf` was missing from the build-manifest program, but `armv8r-none-eabihf` was there, as they were both Tier 3 targets up until very recently. So, I added it, but that might be wrong.

Adjust the Arm targets in CI to reflect latest changes

cc96d3f

* Adds armv7a-none-eabihf (rust-lang#146522) * Adds armv8r-none-eabihf (rust-lang#146520) * Drops armeb*-none-* (rust-lang#146523)

rustbot assigned Mark-Simulacrum Oct 11, 2025

bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Oct 12, 2025

Zalathar mentioned this pull request Oct 12, 2025

Rollup of 12 pull requests #147598

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bors added S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. and removed S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. labels Oct 12, 2025

rust-bors bot added a commit that referenced this pull request Oct 12, 2025

Auto merge of #147596 - thejpster:build-new-arm-tier2-targets, r=<try>

c5785df

Adjust the Arm targets in CI to reflect latest changes try-job: dist-various-1

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thejpster added 2 commits October 12, 2025 17:47

Add CFLAGS for armv8r-none-eabihf

9b91c3e

Change armv7a-none-eabihf CFLAGS to assume only single-precision FPU

fef16d2

Not all ARMv7-A CPUs have a double-precision FPU. So adjust the CFLAGS from `+vfpv3` (which assumes 32 double-precision registers) to `+fp` (which only assumes 16 double-precision registers).

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rust-bors bot added a commit that referenced this pull request Oct 12, 2025

Auto merge of #147596 - thejpster:build-new-arm-tier2-targets, r=<try>

aa8ffd3

Adjust the Arm targets in CI to reflect latest changes try-job: dist-various-1

bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. labels Oct 12, 2025

Zalathar mentioned this pull request Oct 14, 2025

Rollup of 11 pull requests #147659

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Zalathar mentioned this pull request Oct 14, 2025

Rollup of 12 pull requests #147662

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Adjust the Arm targets in CI to reflect latest changes #147596

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Adjust the Arm targets in CI to reflect latest changes #147596

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