boards: arm: add initial support for NUCLEO-L152RE board #15609

frantony · 2019-04-23T07:43:47Z

The board features a STM32L152RET6 MCU.

Tested samples:

hello_world
basic/blinky
basic/button
gui/lvgl + SHIELD=ssd1306_128x64
philosophers
sensor/hmc5883l
subsys/shell/shell_module + CONFIG_EEPROM_SHELL=y
synchronization

TODO

add documentation
add arduino uart connector to boards/arm/nucleo_l152re/nucleo_l152re.dts (grep arduino_serial for details);
add i2c support

Gitlint issues

Commit 80a98632c5:
6: UC4 Line exceeds max length (94>72): " > --- ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xe.h 2019-04-28 20:12:31.112387640 +0300"
7: UC4 Line exceeds max length (94>72): " > +++ ext/hal/st/stm32cube/stm32l1xx/soc/stm32l151xb.h 2019-04-28 20:12:31.108387633 +0300"
9: UC4 Line exceeds max length (110>72): " > MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt /"
10: UC4 Line exceeds max length (110>72): " > BusFault_IRQn = -11, /!< 5 Cortex-M3 Bus Fault Interrupt /"
11: UC4 Line exceeds max length (110>72): " > UsageFault_IRQn = -10, /!< 6 Cortex-M3 Usage Fault Interrupt /"
12: UC4 Line exceeds max length (110>72): " > - SVC_IRQn = -5, /!< 11 Cortex-M3 SV Call Interrupt /"
13: UC4 Line exceeds max length (110>72): " > + SVCall_IRQn = -5, /!< 11 Cortex-M3 SV Call Interrupt /"
14: UC4 Line exceeds max length (110>72): " > DebugMonitor_IRQn = -4, /!< 12 Cortex-M3 Debug Monitor Interrupt /"
15: UC4 Line exceeds max length (110>72): " > PendSV_IRQn = -2, /!< 14 Cortex-M3 Pend SV Interrupt /"
16: UC4 Line exceeds max length (110>72): " > SysTick_IRQn = -1, /!< 15 Cortex-M3 System Tick Interrupt */"
22: UC4 Line exceeds max length (130>72): " arch/arm/include/cortex_m/exc.h:101:19: error: 'SVCall_IRQn' undeclared (first use in this function); did you mean 'SVC_IRQn'?"

erwango

Few comments aside from the bot ones.

dts/arm/st/l1/stm32l152.dtsi

dts/arm/st/l1/stm32l152Xe.dtsi

boards/arm/nucleo_l152re/Kconfig.board

boards/arm/nucleo_l152re/dts_fixup.h

frantony · 2019-04-29T07:28:54Z

Changes introduced in ecdeae6

rebase over latest master branch;
drop boards/arm/nucleo_l152re/dts_fixup.h; we already have UART-related fixups in soc/arm/st_stm32/stm32l1/dts_fixup.h;
add SOC_STM32L152XE and soc/arm/st_stm32/stm32l1/Kconfig.defconfig.stm32l152xe fix copyrights; add necessary SVCall_IRQn definition;
add license to boards/arm/nucleo_l152re/CMakeLists.txt;
test on synchronization sample.

erwango

Thanks for this addition.
Please see my comment on HAL fix.
Then, in order to be integrated your board addition misses the doc.

ext/hal/st/stm32cube/stm32l1xx/soc/stm32l152xe.h

boards/arm/nucleo_l152re/nucleo_l152re.dts

frantony · 2019-05-06T08:42:34Z

@erwango

Then, in order to be integrated your board addition misses the doc.

I have looked for ready-to-use nucleo-64 images and found some image duplication. Please see
#15926

erwango · 2019-07-26T08:57:43Z

@frantony, are you still interested in pushing this PR?
If yes can you rebase and we'll get the review process complete (this will at least need the board doc added).

frantony · 2019-09-22T06:53:21Z

@erwango

I'll return to this PR after finishing #15560.

zephyrbot · 2020-01-07T13:23:33Z

All checks are passing now.

checkpatch (informational only, not a failure)

-:320: WARNING:UNDOCUMENTED_DT_STRING: DT compatible string "st,stm32l152re-nucleo" appears un-documented -- check ./dts/bindings/
#320: FILE: boards/arm/nucleo_l152re/nucleo_l152re.dts:13:
+	compatible = "st,stm32l152re-nucleo", "st,stm32l152";

-:320: WARNING:UNDOCUMENTED_DT_STRING: DT compatible string "st,stm32l152" appears un-documented -- check ./dts/bindings/
#320: FILE: boards/arm/nucleo_l152re/nucleo_l152re.dts:13:
+	compatible = "st,stm32l152re-nucleo", "st,stm32l152";

- total: 0 errors, 2 warnings, 482 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Your patch has style problems, please review.

NOTE: Ignored message types: AVOID_EXTERNS BRACES CONFIG_EXPERIMENTAL CONST_STRUCT DATE_TIME FILE_PATH_CHANGES MINMAX NETWORKING_BLOCK_COMMENT_STYLE PRINTK_WITHOUT_KERN_LEVEL SPLIT_STRING VOLATILE

NOTE: If any of the errors are false positives, please report
      them to the maintainers.

Tip: The bot edits this comment instead of posting a new one, so you can check the comment's history to see earlier messages.

frantony · 2020-01-08T18:31:26Z

@dbkinder @erwango

The PR has "Changes requested" status.

IMHO I have made necessary changes:

the HAL fix is made in ext/hal/st/stm32cube/stm32l1xx: rename SVC_IRQn -> SVCall_IRQn #15744.
the board documentation is added.

Please review the PR.

erwango

@frantony can you add a board.cmake file so board can be flashed using west ?

frantony · 2020-01-13T21:03:46Z

@erwango

can you add a board.cmake file so board can be flashed using west ?

just did it!

erwango · 2020-01-14T08:04:00Z

@frantony, can you fix the issue reported by Nits bot?

frantony · 2020-01-14T19:08:48Z

@erwango

@frantony, can you fix the issue reported by Nits bot?

I have just updated PR. Also EEPROM support is added.

Please review!

The STM32L151 and STM32L152 differ in that the STM32L152 features an LCD controller. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>

The board features a STM32L152RET6 MCU. Tested samples: * hello_world * basic/blinky * basic/button * gui/lvgl + SHIELD=ssd1306_128x64 * philosophers * sensor/hmc5883l * subsys/shell/shell_module + CONFIG_EEPROM_SHELL=y * synchronization Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>

frantony · 2020-01-16T10:59:31Z

@galak

Please review!

galazari

stm32l152xe soc has also a gpio port g and port f that maybe should be enabled also in the soc's defconfig. Additions are also necessary in the dts_fixup.h for this.
Port d, port e and port h is common for the l1 series so this part of code, which is duplicated now, could be moved to the defconfig.series
`
if GPIO_STM32

config GPIO_STM32_PORTD
default y

config GPIO_STM32_PORTE
default y

config GPIO_STM32_PORTH
default y
`

frantony · 2020-01-17T07:26:58Z

@galazari

stm32l152xe soc has also a gpio port g and port f that maybe should be enabled also in the soc's defconfig. Additions are also necessary in the dts_fixup.h for this.
Port d, port e and port h is common for the l1 series so this part of code, which is duplicated now, could be moved to the defconfig.series

This PR adds initial support for NUCLEO-L152RE board with STM32L152RET6 MCU.

Please see this STM32CubeMX screenshort:

The GPIO ports D, E, G and F are not connected to pins of STM32L152RET6!
The GPIO H0 and H1 are connected. Let's see schematic of NUCLEO-L152RE on the page 64 of
STM32 Nucleo-64 board User Manual:

The GPIOH1 can't be used as GPIO on this board. The GPIOH0 is used as external clock input.

Please look at STM32CubeMX NUCLEO-L152RE standard configuration:

Only GPIO ports A, B and C are available on NUCLEO-L152RE board!

Adding D, E, F and G GPIO ports support has no relation to this PR and has to be done separately.

galazari · 2020-01-17T08:43:02Z

@frantony Ok you're right. I was mislead by the mcu's datasheet memory map

erwango · 2020-01-17T09:31:33Z

@galazari If you're on line with the change, can you approve it ?

frantony · 2020-01-20T20:48:06Z

@MaureenHelm

Please review!

maxschuh · 2020-01-22T12:53:52Z

Thanks for the port. However, I have issues running the board. For me all tests including multiple threads (e.g. 'samples/synchronization' and 'samples/philosophers/') fail. There seems to be an error and the board goes into an endless loop (arch_system_halt in fatal.c).

erwango · 2020-01-22T13:02:39Z

@maxschuh,I suspect an issue with the clock_control driver.
Can you try using following clock settings:
CONFIG_CLOCK_STM32_SYSCLK_SRC_HSI=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=16000000

erwango · 2020-01-22T13:04:11Z

@maxschuh , cf #22078 (under investigation)

erwango added the platform: STM32 ST Micro STM32 label Apr 24, 2019

erwango self-requested a review April 24, 2019 15:07

erwango requested changes Apr 24, 2019

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frantony force-pushed the nucleo_l152re branch from 8827809 to ecdeae6 Compare April 29, 2019 07:23

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erwango added the Stale PR label Sep 18, 2019

frantony force-pushed the nucleo_l152re branch from ecdeae6 to 29fc247 Compare January 7, 2020 13:15

frantony requested a review from dbkinder as a code owner January 7, 2020 13:15

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frantony force-pushed the nucleo_l152re branch 2 times, most recently from ad5e384 to 343140d Compare January 7, 2020 20:01

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dbkinder removed their request for review January 14, 2020 22:08

frantony added 2 commits January 15, 2020 09:27

soc: arm: stm32l1: Add STM32L152Xe stuff

990a605

The STM32L151 and STM32L152 differ in that the STM32L152 features an LCD controller. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>

frantony force-pushed the nucleo_l152re branch from a4558a7 to e15e89d Compare January 15, 2020 06:31

erwango approved these changes Jan 15, 2020

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erwango requested a review from MaureenHelm January 16, 2020 13:46

galazari suggested changes Jan 16, 2020

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MaureenHelm approved these changes Jan 21, 2020

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MaureenHelm merged commit f144e39 into zephyrproject-rtos:master Jan 21, 2020

frantony deleted the nucleo_l152re branch January 21, 2020 20:51

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boards: arm: add initial support for NUCLEO-L152RE board #15609

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boards: arm: add initial support for NUCLEO-L152RE board #15609

boards: arm: add initial support for NUCLEO-L152RE board #15609

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Gitlint issues

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checkpatch (informational only, not a failure)

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