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Add support for QuickLogic EOS S3 SoC #23565
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Could you send out the Board definition in the same PR? So CI will pick up and build for the Board/SoC |
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Thanks! Pls, add the Board support (Can be minimal) as part of this PR
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I removed |
As we changed the board we use, I ask for re-review of this PR |
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Looks good, should be ready to merge once zephyrproject-rtos/hal_quicklogic#1 is in.
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Since the HAL PR was merged, I updated |
@carlescufi @ioannisg as from our perspective this is good to go, would you care to [re]review this? |
soc/arm/quicklogic_eos_s3/soc.c
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static int eos_s3_init(struct device *arg) |
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static int eos_s3_init(struct device *arg) | |
static int eos_s3_init(const struct device *arg) |
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Fixed the line as suggested
This is almost ready for merging, just one check, will this be built by default CI? |
@galak and @MaureenHelm please take a look and consider it for 2.4. |
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I have no objections except for:
- Fix the
const struct device
- Make sure this board is built in CI
Add QuickLogic HAL module to west manifest. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Add proper Kconfig for external QuickLogic module. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Add basic devicetree for EOS S3 SoCs. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
Add basic port for QuickLogic EOS S3 SoC. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
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Add basic port for EOS S3 Quick Feather board. Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
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I fixed the suggestion from @carlescufi and rebased the branch. |
Hi @PiotrZierhoffer , me and @JDuchniewicz are working on a project utilising an EOS S3 based board (SparkFun's Qt PLUS), and are struggling to get it to flash properly using the adapted version of TinyFPGA programmer (https://github.com/QuickLogic-Corp/TinyFPGA-Programmer-Application/tree/master). I was wondering whether you could share with us what was your workflow/tools when working with the board? (Right now for us the board hangs when Verifying binary written to the board - this is happening on 2 different boards and tested on 3 different setups (MacOS, Ubuntu 20.04, Arch Linux)). Any help would be highly appreciated! |
@PiotrZierhoffer For context - I also tried flashing using openOCD via STLINK but am always met with a time out when trying to halt the target CPU: Also I belive @JDuchniewicz tried flashing using JLINK, without much success. |
This PR is the first from a series of PRs related to the EOS S3 ecosystem.
EOS S3 is a Cortex-M4-F based platform with an FPGA and a sensor processing subsystem.
The series will add support for the SoC itself, for the boards and several drivers.
More to read:
The series will consist of the following PRs: