[Arm64] AddAcross MaxAcross MinAcross MaxNumber MaxNumberPairwise MaxPairwise #32620
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…ormNotSupported.cs
…ormNotSupported.cs
…ormNotSupported.cs
…dvSimd.PlatformNotSupported.cs
…dvSimd.PlatformNotSupported.cs
…n type being a struct" in HWIntrinsicInfo::lookupSimdSize in hwintrinsic.cpp
…p in emitarm64.cpp
…duct in src/jit/codegenarm64.cpp
…, uminv in emitarm64.cpp emitfmtsarm64.h instrsarm64.h
…4 in GenerateTests.csx
…4 in GenerateTests.csx
…plate.template _UnaryOpTestTemplate.template
echesakov
added
arch-arm64
area-System.Runtime.Intrinsics
area-CodeGen-coreclr
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Note regarding the This serves as a reminder for when your PR is modifying a ref *.cs file and adding/modifying public APIs, to please make sure the API implementation in the src *.cs file is documented with triple slash comments, so the PR reviewers can sign off that change. |
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@CarolEidt @tannergooding @TamarChristinaArm PTAL |
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@briansull I changed the emitter for fmaxv, faddp, smax etc as we discussed. Can you please review these changes? |
| @@ -4516,13 +4516,13 @@ void CodeGen::genSIMDIntrinsicDotProduct(GenTreeSIMD* simdNode) | |||
| { | |||
| if (opt == INS_OPTS_4S) | |||
| { | |||
| GetEmitter()->emitIns_R_R_R(INS_faddp, attr, tmpReg, tmpReg, tmpReg, INS_OPTS_4S); | |||
| GetEmitter()->emitIns_R_R_R(INS_faddp, EA_16BYTE, tmpReg, tmpReg, tmpReg, INS_OPTS_4S); | |||
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These are just changing the size from element to vector right?
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Exactly - my previous change #32277 that did the opposite for faddp (i.e. changing the size from vector to element) was breaking consistency with other part of the JIT and I am rolling it back here.
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@tannergooding Should I remove label new-api-needs-documentation since I documented all the newly added functions here? Or you will use for some bookkeeping at the later point? |
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I'm fine with it being removed provided everything was documented. |
echesakov
deleted the
Arm64-Add-Max-Min-Across-Number-NumberPairwise-Pairwise
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Updates AddAcross to return Vector64 as we discussed in API review meeting
Updates emitter such that emitIns functions for faddp (scalar), fmaxp (scalar), fmaxv, smaxv and similar instructions require opt argument to have non-INS_OPTS_NONE value (i.e. specified according to the Arm technical documentation even in a case when an instruction has only one valid vector arrangement). For example, 2-operand form of faddp requires INS_OPTS_2D options to be specified and fmaxv requires INS_OPTS_4S.
Changes the precedence of criteria for computing instruction SIMD size for GT_HWINTRINSIC node (7391ecd). Before the change, if an intrinsic returns a struct type value - then the size of the value will be used for determining SIMD size. After the change, if an intrinsic has a flag BaseTypeFromFirstArg or BaseTypeFromSecondArg specified - then the SIMD size of the tree node will be based on the corresponding parameter size (i.e op1 or op2 size). For example, AddAcross always returns Vector64 value and the SIMD size cannot be based on the return value size (since it will be the same for AddAcross(Vector64) and AddAcross(Vector128)).
Moves smaxv, sminv, addv and similar instructions to a separate instruction form DV_2T.
Below commits are grouped by their themes:
System.Private.CoreLib\src\System\Runtime\Intrinsics\Arm
ff93898 Add "MaxAcross" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
4a9c400 Add "MinAcross" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
cae0066 Update "AddAcross" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
9b13e23 Add "AddPairwise" and "AddPairwiseScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
6dcee66 Add "MaxPairwise" and "MaxPairwiseScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
8748dda Add "MinPairwise" and "MinPairwiseScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
3bcdd50 Add "MaxNumber" and "MaxNumberScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
32380ad Add "MaxNumberPairwise" and "MaxNumberPairwiseScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
7128c88 Add "MinNumber" and "MinNumberScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
c285661 Add "MinNumberPairwise" and "MinNumberPairwiseScalar" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
a3c2767 Add "MinNumberAcross" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
b5931c6 Add "MaxNumberAcross" in AdvSimd.cs AdvSimd.PlatformNotSupported.cs
src\libraries\System.Runtime.Intrinsics.Experimental\ref
ad52b4f Update System.Runtime.Intrinsics.Experimental.cs
src\coreclr\src\jit
7391ecd Precedence of BaseTypeFromFirstArg, BaseTypeFromSecondArg over "return type being a struct" in HWIntrinsicInfo::lookupSimdSize in hwintrinsic.cpp
74f3776 Fix comment in instrsarm64.h
a75ec58 Datasize = 16 bytes for fmaxnmv, fmaxv, fminnv, fminv in emitarm64.cpp
58eba4a Datasize = 8 bytes or 16 bytes for faddp, fmaxnmp, fmaxp, fminp, fminp in emitarm64.cpp
c19b26e Datasize = 16 bytes for addp in emitarm64.cpp
e89d6af Update usages of faddp instruction in CodeGen::genSIMDIntrinsicDotProduct in src/jit/codegenarm64.cpp
a115435 Use DV_2T encoding form for addv, saddlv, smaxv, sminv, uaddlv, umaxv, uminv in emitarm64.cpp emitfmtsarm64.h instrsarm64.h
b22616e Share IF_DV_2A and IF_DV_2R in emitter::emitOutputInstr in emitarm64.cpp
4abd134 Fix formatting in emitarm64.cpp
b0f9e03 Update "AddAcross" in hwintrinsiclistarm64.h
fbea4f0 Add "MaxAcross" and "MinAcross" in hwintrinsiclistarm64.h
d03e744 Add "AddPairwise" and "AddPairwiseScalar" in hwintrinsiclistarm64.h
4a0d153 Add "MaxPairwise" and "MaxPairwiseScalar" in hwintrinsiclistarm64.h
dd1fe99 Add "MinPairwise" and "MinPairwiseScalar" in hwintrinsiclistarm64.h
c70d14b Order methods alphabetically in hwintrinsiclistarm64.h
2b7f289 Add "MaxNumber" and "MaxNumberScalar" in hwintrinsiclistarm64.h
6efbbbc Add "MinNumber" and "MinNumberScalar" in hwintrinsiclistarm64.h
62de9f7 Add "MaxNumberPairwise" and "MaxNumberPairwiseScalar" in hwintrinsiclistarm64.h
140d435 Add "MinNumberPairwise" and "MinNumberPairwiseScalar" in hwintrinsiclistarm64.h
e8f2ad2 Add "MaxNumberAcross" in hwintrinsiclistarm64.h
bb14f72 Add "MinNumberAcross" in hwintrinsiclistarm64.h
405fc6f Update CodeGen::genArm64EmitterUnitTests() in codegenarm64.cpp
src\coreclr\tests\src\JIT\HardwareIntrinsics\Arm
07eb50b Update "AddAcross" in GenerateTests.csx
7a80cbf Add "MaxAcross" in GenerateTests.csx
3ca6980 Add "MinAcross" in GenerateTests.csx
c91cd6a Add "MaxNumber" and "MaxNumberScalar" in GenerateTests.csx
9c663bd Add "MinNumber" and "MinNumberScalar" in GenerateTests.csx
2b4ade6 Add "MaxNumberAcross" and "MinNumberAcross" in GenerateTests.csx
7fe0318 Add "AddPairwise" in AdvSimd in GenerateTests.csx
7cbef4d Add "AddPairwise" and "AddPairwiseScalar" in AdvSimd.Arm64 in GenerateTests.csx
dfb70f8 Add "MaxPairwise" in AdvSimd in GenerateTests.csx
0573dec Add "MaxPairwise" and "MaxPairwiseScalar" in AdvSimd.Arm64 in GenerateTests.csx
54724f7 Add "MinPairwise" in AdvSimd in GenerateTests.csx
82de0d1 Add "MinPairwise" and "MinPairwiseScalar" in AdvSimd.Arm64 in GenerateTests.csx
808a55d Add "MaxNumberPairwise" and "MaxNumberPairwiseScalar" in AdvSimd.Arm64 in GenerateTests.csx
9acbc2c Add "MinNumberPairwise" and "MinNumberPairwiseScalar" in AdvSimd.Arm64 in GenerateTests.csx
b4d77d5 Update Helpers.cs Helpers.tt
737288a Update AdvSimd/ AdvSimd.Arm64/
e096445 Remove whitespace in _BinaryOpTestTemplate.template _TernaryOpTestTemplate.template _UnaryOpTestTemplate.template
28d9648 Update AdvSimd/ AdvSimd.Arm64/
Part of #24794