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Now use latest VTR as a submodule #747

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merged 178 commits into from
Sep 22, 2022
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2f0df8f
[submodule] now use a feature branch of VTR as a submodule
tangxifan Aug 16, 2022
9979ea6
[submodule] update
tangxifan Aug 16, 2022
075900a
[engine] remove out-of-date codes due to the upgrades in VTR submodule
tangxifan Aug 16, 2022
118e5b6
[engine] now consider vtr submodule when compilation, remove out-of-d…
tangxifan Aug 16, 2022
98b1917
[script] fixed CMake errors
tangxifan Aug 16, 2022
ce7204d
[engine] debugging
tangxifan Aug 16, 2022
3bd7108
[lib] update vtr
tangxifan Aug 16, 2022
9b3e358
[lib] update vtr
tangxifan Aug 16, 2022
0c32986
[engine] Use RRGraphView in openfpga source codes
tangxifan Aug 16, 2022
d3d81f0
[engine] keep adapting to latest VTR
tangxifan Aug 17, 2022
7169295
[engine] adapting source files for new APIs in VTR
tangxifan Aug 17, 2022
62c03b4
[engine] update vtr
tangxifan Aug 17, 2022
ade8f43
[engine] Updating RRGraph Annotation and VTr
tangxifan Aug 17, 2022
01d53db
[script] Adapt timing analysis APIs
tangxifan Aug 17, 2022
4e871be
[engine] adapt the use of API in RRGraph for annotation functions
tangxifan Aug 17, 2022
8f1aac8
[engine] fixing mismatches in APIs
tangxifan Aug 17, 2022
3c12810
[engine] debugging
tangxifan Aug 17, 2022
3c2bf51
[engine] use new API to get node side
tangxifan Aug 17, 2022
ce32c3b
[engine] fixing api errors
tangxifan Aug 17, 2022
e0ae851
[engine] correcting compilation errors due to vpr upgrade
tangxifan Aug 17, 2022
fef7991
[engine] update vpr
tangxifan Aug 17, 2022
dfe30df
[engine] resolve compilation warnings
tangxifan Aug 17, 2022
cb4b106
[engine] correcting syntax errors
tangxifan Aug 17, 2022
09dbb6c
[engine] update vtr
tangxifan Aug 18, 2022
40100c1
[engine] remove warnings
tangxifan Aug 18, 2022
4e297bf
[script] revert compilation warning flags
tangxifan Aug 18, 2022
e9c4d10
[engine] rename files to avoid conflicts with VPR files
tangxifan Aug 18, 2022
e909f4f
[lib] rename libopenfpga to libs
tangxifan Aug 18, 2022
7319ded
[script] now openfpga binary should be in the build directory
tangxifan Aug 18, 2022
c0b1d76
[script] change default tool paths for OpenFPGA flow scripts
tangxifan Aug 18, 2022
a525973
[script] remove duplicated libraries in dependency list for some libo…
tangxifan Aug 18, 2022
f1422bf
Merge branch 'master' into vtr_upgrade
tangxifan Aug 18, 2022
2957b3a
[lib] remove useless header files
tangxifan Aug 18, 2022
2d05462
[lib] remove warnings
tangxifan Aug 18, 2022
903dd6c
[engine] remove warnings
tangxifan Aug 18, 2022
510f453
[engine] update vtr
tangxifan Aug 18, 2022
800ce6a
[engine] avoid function naming conflicts
tangxifan Aug 19, 2022
86a0768
[script] comment some debugging flags`
tangxifan Aug 19, 2022
a61d6a2
[script] developing arch converting script
tangxifan Aug 22, 2022
5134ea2
[script] save progress
tangxifan Aug 22, 2022
880d712
[script] complete code; start debugging on arch file converter
tangxifan Aug 22, 2022
4efc506
[script] now change to use minidom and debugging the child removal
tangxifan Aug 22, 2022
2f5ea0c
[script] functional arch file converter; need to clean up formatting …
tangxifan Aug 22, 2022
4a7c3fc
[script] debugging format
tangxifan Aug 23, 2022
55e765a
[script] slight improve on formatting
tangxifan Aug 23, 2022
3c9c11d
[script] working on formatting
tangxifan Aug 23, 2022
8d45903
[script] makefile for vpr arch
tangxifan Aug 23, 2022
b6e1175
[script] update doc and avoid modify README.MD when updating arch files
tangxifan Aug 23, 2022
2bbf2f0
[script] now return status on each arch upgrade task
tangxifan Aug 23, 2022
6c44f32
[script] fixed a bug
tangxifan Aug 23, 2022
bdb051f
[arch] update arch files
tangxifan Aug 23, 2022
d5f56aa
[lib] typo
tangxifan Aug 23, 2022
5d6a90d
[engine] remove compile warnings
tangxifan Aug 23, 2022
c17e5d4
[engine] fixed a bug due to the API of subtile data structure
tangxifan Aug 23, 2022
ba0ddd0
[engine] fixing the bugs on subtiles
tangxifan Aug 23, 2022
fa790d5
[script] fixed a bug on wrong path to the ace2 executable
tangxifan Aug 23, 2022
10cefeb
[engine] fixing bugs on using subtile index
tangxifan Aug 23, 2022
019e663
[engine] fixing the bugs on building global nets to sub tile pins
tangxifan Aug 23, 2022
0a6b794
[engine] fixed bugs in subtiles. Revisited the usage of client functions
tangxifan Aug 23, 2022
892770a
[engine] debugging subtile index failures
tangxifan Aug 23, 2022
b3e4a06
[engine] adapt vpr wrapper to the latest main.cpp from vtr
tangxifan Aug 23, 2022
326075d
[engine] update vtr
tangxifan Aug 23, 2022
d3c6967
[engine] update vtr
tangxifan Aug 23, 2022
f0728aa
[engine] update vtr
tangxifan Aug 23, 2022
d1edc51
[engine] clean up header files that include rr_graph_obj
tangxifan Aug 24, 2022
205ebb3
[engine] update vtr
tangxifan Aug 24, 2022
f731185
[engine] update vtr
tangxifan Aug 24, 2022
ba6ae05
[engine] update vtr and add in_edge checks to link_arch
tangxifan Aug 24, 2022
4561d48
[engine] update vtr
tangxifan Aug 24, 2022
92a7f37
[engine] update vtr
tangxifan Aug 24, 2022
505b729
[script] reworked top-level makefile: add help desk, support build types
tangxifan Aug 24, 2022
f853040
[script] enable IPO in cmakefile
tangxifan Aug 24, 2022
bd36399
[script] suppress cmake output
tangxifan Aug 24, 2022
5403f64
[ci] remove gcc-5 support; OS support is upgraded to Ubuntu 20.04 LTS…
tangxifan Aug 24, 2022
511cc3a
[ci] remove out-of-date file
tangxifan Aug 24, 2022
20e6450
[ci] enable gcc-6 support
tangxifan Aug 24, 2022
704dba1
[ci] streamline workflow file by moving cmake commands to top-level m…
tangxifan Aug 24, 2022
26d540a
[ci] typo
tangxifan Aug 24, 2022
9de78c3
[ci] enable sudo
tangxifan Aug 24, 2022
665d0da
[ci] add comments to install dependency scripts
tangxifan Aug 24, 2022
c8d02f0
[script] add IPO warning flags
tangxifan Aug 24, 2022
843aaf7
[ci] syntax error
tangxifan Aug 24, 2022
cd1c77c
[ci] remove support for gcc-6
tangxifan Aug 25, 2022
ab9d965
[ci] wrong option
tangxifan Aug 25, 2022
83600d2
[script] add install target for lib CMakefile
tangxifan Aug 25, 2022
a50392f
[script] update CMakefile to streamline test source files
tangxifan Aug 25, 2022
7eef634
[ci] add missing package to dependency build script
tangxifan Aug 25, 2022
b432ac0
[script] fixed typo on IPO options
tangxifan Aug 25, 2022
25f6c52
[engine] fixed syntax errors when using clang
tangxifan Aug 25, 2022
abf9757
[ci] fixed the wrong paths to executable when building docker images
tangxifan Aug 25, 2022
eda989d
[ci] update docker setting due to changes in build compatibility and …
tangxifan Aug 25, 2022
3bc2fa7
[ci] avoid to use docker image for build compatibility now
tangxifan Aug 25, 2022
2e8de29
[ci] updated paths to executables in docker image
tangxifan Aug 25, 2022
8d6682c
[test] fixed a bug when removing previous runs
tangxifan Aug 25, 2022
b406aaa
[engine] update vtr
tangxifan Aug 26, 2022
4200a25
Merge branch 'vtr_upgrade' of github.com:lnis-uofu/OpenFPGA into vtr_…
tangxifan Aug 26, 2022
3ad51ec
[engine] update vtr
tangxifan Aug 26, 2022
c36e984
[engine] update vtr
tangxifan Aug 26, 2022
821e440
[engine] update vtr
tangxifan Aug 26, 2022
24c9ca9
[engine] update vtr
tangxifan Aug 26, 2022
c516e92
[engine] update vtr
tangxifan Aug 26, 2022
989c2c8
[engine] update vtr
tangxifan Aug 26, 2022
f423fd1
[engine] update vtr
tangxifan Aug 27, 2022
53a0dce
[ci] now revert to Ubuntu 18.04, see if docker can work or not
tangxifan Aug 27, 2022
c03fab8
[engine] update vtr
tangxifan Aug 27, 2022
0c2b49d
[engine] remove debugging log output
tangxifan Aug 27, 2022
8c46b43
[engine] update vtr
tangxifan Aug 28, 2022
83c2330
[engine] update vtr
tangxifan Aug 28, 2022
e9d6e7e
[engine] update vtr and enable more debugging info
tangxifan Aug 28, 2022
9b6615f
[engine] update vtr
tangxifan Aug 28, 2022
b9abdbc
[engine] enable verbose output
tangxifan Aug 28, 2022
b9fade4
[script] turn off the pb_pin_fix_up in vpr run for mcnc and vtr bench…
tangxifan Aug 28, 2022
ef3381a
[script] also turn off pb_pin_fixup in vpr for quicklogic tests
tangxifan Aug 28, 2022
dbacee8
[script] turn off equivalent for soft adder architecture as we do not…
tangxifan Aug 28, 2022
02dd013
[CiFix] Docker image
ganeshgore Aug 29, 2022
d51b7c9
Merge pull request #750 from lnis-uofu/ganesh_dev
tangxifan Aug 29, 2022
71ad072
Merge branch 'master' into vtr_upgrade
tangxifan Aug 31, 2022
e175c77
Merge branch 'master' into vtr_upgrade
tangxifan Sep 1, 2022
7c5046c
[engine] include the correct header file
tangxifan Sep 1, 2022
ee87b5c
[engine] fixed all the remaining syntax errors due to API mismatches
tangxifan Sep 1, 2022
6e5520c
[engine] update vtr
tangxifan Sep 1, 2022
04c1489
[engine] update vtr
tangxifan Sep 1, 2022
e4aa6e0
[engine] syntax
tangxifan Sep 1, 2022
c691eb0
Merge branch 'master' into vtr_upgrade
tangxifan Sep 1, 2022
9e1abf5
Merge branch 'master' into vtr_upgrade
tangxifan Sep 2, 2022
b26b2d0
Merge branch 'master' into vtr_upgrade
tangxifan Sep 2, 2022
409753d
Merge branch 'master' into vtr_upgrade
tangxifan Sep 3, 2022
56619f9
Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into v…
tangxifan Sep 7, 2022
a81de4e
[engine] update vtr
tangxifan Sep 7, 2022
e5c7a3d
[engine] syntax
tangxifan Sep 7, 2022
148bf5e
[engine] update vtr
tangxifan Sep 7, 2022
f74f1a6
[engine] update vtr
tangxifan Sep 7, 2022
cd112ce
Merge branch 'master' into vtr_upgrade
tangxifan Sep 8, 2022
95d7a17
Merge branch 'master' into vtr_upgrade
tangxifan Sep 9, 2022
8bd55ba
[engine] update vtr
tangxifan Sep 9, 2022
266da6d
[engine] update vtr
tangxifan Sep 9, 2022
e98d022
[engine] update vtr
tangxifan Sep 16, 2022
3735664
Merge branch 'master' of https://github.com/lnis-uofu/OpenFPGA into v…
tangxifan Sep 16, 2022
9e8c6be
[engine] update vtr
tangxifan Sep 17, 2022
fcf4525
[engine] update vtr
tangxifan Sep 17, 2022
29fff9e
[engine] update vtr
tangxifan Sep 17, 2022
4dd90f4
[engine] update vtr
tangxifan Sep 17, 2022
fa2cc87
[engine] update vtr
tangxifan Sep 17, 2022
370ddcc
[engine] update vtr
tangxifan Sep 18, 2022
76720df
[engine] update vtr
tangxifan Sep 18, 2022
d1334ef
[engine] update vtr
tangxifan Sep 18, 2022
7cfc50a
[vtr] update engin
tangxifan Sep 19, 2022
fec6905
[engine] update vtr
tangxifan Sep 19, 2022
a7416d2
[engine] update vpr
tangxifan Sep 19, 2022
c340330
[engine] update vtr
tangxifan Sep 19, 2022
87c63d1
[engine] update vtr
tangxifan Sep 19, 2022
3c6ef19
[engine] now sort ipin incoming edges
tangxifan Sep 19, 2022
050b6ed
[engine] update vtr
tangxifan Sep 19, 2022
5eba2d7
[engine] update vpr
tangxifan Sep 19, 2022
90ddd2c
[engine] now get incoming edges for IPINs only from GSB
tangxifan Sep 19, 2022
c922259
[engine] remove warnings and update vtr
tangxifan Sep 19, 2022
9b0a97d
[engine] update vtr
tangxifan Sep 19, 2022
1177e87
[engine] update vtr
tangxifan Sep 19, 2022
e19ca1c
[engine] fixed a bug when decoding bitstream for connnection blocks: …
tangxifan Sep 20, 2022
fca1c82
[test] disable clustering and routing sync when using VPR
tangxifan Sep 20, 2022
d9bd0a6
[test] disable clustering-routing result sync-up when calling vpr in …
tangxifan Sep 20, 2022
40663f9
[test] relax counter128 required routing width from 50 to 60; Seem th…
tangxifan Sep 20, 2022
63cb8d5
[test] fixed a typo
tangxifan Sep 20, 2022
b3449a3
[arch] update out-of-date vpr arch from v1.1 to v1.2
tangxifan Sep 20, 2022
846ca26
[test] enable block usage information output when running vpr. Otherw…
tangxifan Sep 20, 2022
37c5056
[test] now use a fixed routing channel width for quicklogic tests
tangxifan Sep 20, 2022
abee802
[script] now build task_result.csv from openfpgashell.log rather than…
tangxifan Sep 20, 2022
b630d60
[test] update arch bitstream and force a pin placement for the test c…
tangxifan Sep 20, 2022
36603f9
Merge branch 'master' into vtr_upgrade
tangxifan Sep 21, 2022
97f0445
[arch] upgrade arch file which was designed for v1.1
tangxifan Sep 21, 2022
40edf85
Merge branch 'vtr_upgrade' of github.com:lnis-uofu/OpenFPGA into vtr_…
tangxifan Sep 21, 2022
d0b018a
[script] mismatches in vpr options due to upgrade
tangxifan Sep 21, 2022
baac236
[test] fixed a bug in example scripts due to the changes on vpr options
tangxifan Sep 21, 2022
b532bca
[script] update golden outputs: see no changes in fabric netlists; ac…
tangxifan Sep 21, 2022
eaa0b55
[test] fixed a bug in pin constrain examples
tangxifan Sep 21, 2022
b1f8cda
[test] update missing arch files which are not placed in the openfpga…
tangxifan Sep 21, 2022
79b260f
[arch] update missing arch
tangxifan Sep 21, 2022
d543a86
Merge branch 'master' into vtr_upgrade
tangxifan Sep 22, 2022
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1 change: 1 addition & 0 deletions .dockerignore
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
**

# Allow files and directories
!build/**
!/.github/**
!/*.*
!/abc/abc
Expand Down
96 changes: 33 additions & 63 deletions .github/workflows/build.yml
Original file line number Diff line number Diff line change
Expand Up @@ -68,18 +68,14 @@ jobs:
if: ${{ fromJSON(needs.change_detect.outputs.source_modified) }}
name: ${{ matrix.config.name }}
runs-on: ubuntu-18.04
container: ghcr.io/${{ needs.change_detect.outputs.docker_repo }}/openfpga-build-${{ matrix.config.cc}}
# Note: dependencies are installed in the container. See details about dependency list in docker/Dockerfile.master
# Comment the line out when base image is built again
#container: ghcr.io/${{ needs.change_detect.outputs.docker_repo }}/openfpga-build-${{ matrix.config.cc}}
# Branch on different OS and settings
strategy:
fail-fast: false
matrix:
config:
- name: "Build Compatibility: GCC-5 (Ubuntu 18.04)"
cc: gcc-5
cxx: g++-5
- name: "Build Compatibility: GCC-6 (Ubuntu 18.04)"
cc: gcc-6
cxx: g++-6
- name: "Build Compatibility: GCC-7 (Ubuntu 18.04)"
cc: gcc-7
cxx: g++-7
Expand All @@ -89,21 +85,28 @@ jobs:
- name: "Build Compatibility: GCC-9 (Ubuntu 18.04)"
cc: gcc-9
cxx: g++-9
- name: "Build Compatibility: GCC-10 (Ubuntu 18.04)"
cc: gcc-10
cxx: g++-10
- name: "Build Compatibility: GCC-11 (Ubuntu 18.04)"
cc: gcc-11
cxx: g++-11
- name: "Build Compatibility: Clang-6 (Ubuntu 18.04)"
cc: clang-6.0
cxx: clang++-6.0
- name: "Build Compatibility: Clang-7 (Ubuntu 18.04)"
cc: clang-7
cxx: clang++-7
- name: "Build Compatibility: Clang-8 (Ubuntu 18.04)"
cc: clang-8
cxx: clang++-8
- name: "Build Compatibility: Clang-10 (Ubuntu 18.04)"
cc: clang-10
cxx: clang++-10
# Define the steps to run the build job
env:
CC: ${{ matrix.config.cc }}
CXX: ${{ matrix.config.cxx }}
CCACHE_COMPRESS: "true"
CCACHE_COMPRESSLEVEL: "6"
CCACHE_MAXSIZE: "400M"
CCACHE_LOGFILE: ccache_log
CCACHE_DIR: /__w/OpenFPGA/.ccache
steps:
- name: Cancel previous
uses: styfle/cancel-workflow-action@0.9.1
Expand All @@ -115,53 +118,21 @@ jobs:
with:
submodules: true

- name: Install dependencies
run: ./.github/workflows/install_dependencies_build.sh

- name: Dump tool versions
run: |
cmake --version
iverilog -V
vvp -V
${CC} --version
${CXX} --version

- name: Prepare ccache timestamp
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
message("::set-output name=timestamp::${current_date}")

- name: Create CMake build environment
# Some projects don't allow in-source building, so create a separate build directory
# We'll use this as our working directory for all subsequent commands
run: cmake -E make_directory build

- name: Setup ccache
uses: actions/cache@v2
with:
path: |
/__w/OpenFPGA/.ccache
key: ${{ matrix.config.cc }}-ccache-${{ github.ref}}
restore-keys: |
${{ matrix.config.cc }}-ccache-

- name: Configure CMake
# Use a bash shell so we can use the same syntax for environment variable
# access regardless of the host operating system
shell: bash
working-directory: build
# Note the current convention is to use the -S and -B options here to specify source
# and build directories, but this is only available with CMake 3.13 and higher.
# The CMake binaries on the Github Actions machines are (as of this writing) 3.12
#
run: |
ccache -p
ccache -z
cmake .. -DCMAKE_BUILD_TYPE=$BUILD_TYPE
- uses: hendrikmuhs/ccache-action@v1

- name: Build
working-directory: build
shell: bash
# Execute the build. You can specify a specific target with "--target <NAME>"
run: |
cmake --build . --config $BUILD_TYPE
make all BUILD_TYPE=$BUILD_TYPE

# Check the cache size and see if it is over the limit
- name: Check ccache size
Expand All @@ -172,14 +143,13 @@ jobs:
with:
name: openfpga
path: |
abc/abc
abc/libabc.a
ace2/ace
ace2/libace.a
openfpga/libopenfpga.a
openfpga/openfpga
vpr/libvpr.a
vpr/vpr
build/vtr-verilog-to-routing/abc/abc
build/vtr-verilog-to-routing/abc/libabc.a
build/vtr-verilog-to-routing/ace2/ace
build/vtr-verilog-to-routing/vpr/libvpr.a
build/vtr-verilog-to-routing/vpr/vpr
build/openfpga/libopenfpga.a
build/openfpga/openfpga
yosys/install/share
yosys/install/bin
openfpga_flow
Expand Down Expand Up @@ -253,10 +223,10 @@ jobs:
name: openfpga
- name: chmod
run: |
chmod +x abc/abc
chmod +x ace2/ace
chmod +x openfpga/openfpga
chmod +x vpr/vpr
chmod +x build/vtr-verilog-to-routing/abc/abc
chmod +x build/vtr-verilog-to-routing/ace2/ace
chmod +x build/vtr-verilog-to-routing/vpr/vpr
chmod +x build/openfpga/openfpga
chmod +x yosys/install/bin/yosys
chmod +x yosys/install/bin/yosys-abc
chmod +x yosys/install/bin/yosys-config
Expand Down
6 changes: 4 additions & 2 deletions .github/workflows/docker.yml
Original file line number Diff line number Diff line change
Expand Up @@ -64,13 +64,15 @@ jobs:
strategy:
matrix:
compiler:
- gcc-5
- gcc-6
- gcc-7
- gcc-8
- gcc-9
- gcc-10
- gcc-11
- clang-6.0
- clang-7
- clang-8
- clang-10
steps:
- name: Checkout
uses: actions/checkout@v2
Expand Down
22 changes: 20 additions & 2 deletions .github/workflows/install_dependencies_build.sh
Original file line number Diff line number Diff line change
@@ -1,4 +1,8 @@
apt-get update && apt-get install -y \
#!/usr/bin/env bash

# The package list is designed for Ubuntu 20.04 LTS
sudo apt-get update
sudo apt-get install -y \
autoconf \
automake \
bison \
Expand Down Expand Up @@ -40,4 +44,18 @@ apt-get update && apt-get install -y \
wget \
zip \
swig \
expect
expect \
g++-7 \
gcc-7 \
g++-8 \
gcc-8 \
g++-9 \
gcc-9 \
g++-10 \
gcc-10 \
g++-11 \
gcc-11 \
clang-6.0 \
clang-7 \
clang-8 \
clang-10
53 changes: 0 additions & 53 deletions .github/workflows/install_dependency_old.sh

This file was deleted.

4 changes: 4 additions & 0 deletions .gitmodules
Original file line number Diff line number Diff line change
Expand Up @@ -6,3 +6,7 @@
[submodule "yosys-plugins"]
path = yosys-plugins
url = https://github.com/SymbiFlow/yosys-symbiflow-plugins
[submodule "vtr-verilog-to-routing"]
path = vtr-verilog-to-routing
url = https://github.com/verilog-to-routing/vtr-verilog-to-routing.git
branch = openfpga
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