A64FX

Architecture specific notes for Fujitsu A64FX (ARMv8)

Performance groups

Fujitsu A64FX Performance groups

Events

The input file for the events on Fujitsu A64FX (ARMv8) can be found here.

Counters

• Core-local counters
  • General-purpose counters

Core-local counters

General-purpose counters

The Fujitsu A64FX (ARMv8) microarchitecture provides 6 general-purpose counters consisting of a config and a counter register.

Counter name	Event name
PMC0	*
PMC1	*
PMC2	*
PMC3	*
PMC4	*
PMC5	*

Currently no options are available for Fujitsu A64FX (ARMv8). All handling is managed by perf_event. The code should work for all variants of the Fujitsu A64FX architecture but some events might not work like the TOFU events for the FX700 variant as it does not have the Tofu interconnect.

Fujitsu published an errata document but since the link can change:

Event	Correction
L2D_CACHE_REFILL	L2D_CACHE_REFILL - L2D_SWAP_DM - L2D_CACHE_MIBMCH_PRF
L2D_CACHE_REFILL_DM	L2D_CACHE_REFILL_DM - L2D_SWAP_DM
L2D_CACHE_REFILL_PRF	L2D_CACHE_REFILL_PRF - L2D_CACHE_MIBMCH_PRF
L2_MISS_COUNT	L2_MISS_COUNT - L2D_CACHE_SWAP_LOCAL - L2_PIPE_COMP_PF_L2MIB_MCH

Despite the PMC counters are specific for each hardware thread, some events can only be counted on a CMG basis:

• BUS_READ_TOTAL_TOFU
• BUS_WRITE_TOTAL_TOFU
• BUS_READ_TOTAL_MEM
• BUS_WRITE_TOTAL_MEM
• BUS_READ_TOTAL_PCI
• BUS_WRITE_TOTAL_PCI
• BUS_WRITE_TOTAL_CMG0
• BUS_WRITE_TOTAL_CMG0
• BUS_WRITE_TOTAL_CMG0