Tigerlake

Architecture specific notes for Intel® Tigerlake

Performance groups

Intel® Tigerlake Performance groups

Events

The input file for the events on Intel® Tigerlake can be found here.

Counters

• Core-local counters
  • Fixed-purpose counters
  • Performance metric counters
  • General-purpose counters
  • Thermal counter
  • Core voltage counter
• Socket-wide counters
  • Energy counters

Core-local counters

Fixed-purpose counters

Since the Core2 microarchitecture, Intel® provides a set of fixed-purpose counters. Each can measure only one specific event.

Counters

Counter name	Event name
FIXC0	INSTR_RETIRED_ANY
FIXC1	CPU_CLK_UNHALTED_CORE
FIXC2	CPU_CLK_UNHALTED_REF

Available Options

Option	Argument	Description	Comment
anythread	N	Set bit 2+(index*4) in config register
kernel	N	Set bit (index*4) in config register

Performance metric counters

With the Intel® Tigerlake microarchitecture a new class of core-local counters was introduced, the so-called perf-metrics. The reflect the first level of the Top-down Microarchitecture Analysis tree.

Counters

Counter name	Event name
TMA0	RETIRING
TMA1	BAD_SPECULATION
TMA2	FRONTEND_BOUND
TMA3	BACKEND_BOUND

The events return the fraction of slots used by the event.

General-purpose counters

The Intel® Tigerlake microarchitecture provides 4 general-purpose counters consisting of a config and a counter register.

Counters

Counter name	Event name
PMC0	*
PMC1	*
PMC2	*
PMC3	*
PMC4	* (only available without HyperThreading)
PMC5	* (only available without HyperThreading)
PMC6	* (only available without HyperThreading)
PMC7	* (only available without HyperThreading)

Available Options

Option	Argument	Description	Comment
edgedetect	N	Set bit 18 in config register
kernel	N	Set bit 17 in config register
anythread	N	Set bit 21 in config register	The anythread option is deprecated! Please check the documentation how to use it on Tigerlake
threshold	8 bit hex value	Set bits 24-31 in config register
invert	N	Set bit 23 in config register
in_transaction	N	Set bit 32 in config register	Only available if Intel® Transactional Synchronization Extensions are available
in_transaction_aborted	N	Set bit 33 in config register	Only counter PMC2 and only if Intel® Transactional Synchronization Extensions are available

Thermal counter

The Intel® Tigerlake microarchitecture provides one register for the current core temperature.

Counters

Counter name	Event name
TMP0	TEMP_CORE

Core voltage counter

The Intel® Tigerlake microarchitecture provides one register for the current core voltage.

Counters

Counter name	Event name
VTG0	VOLTAGE_CORE

Socket-wide counters

Energy counters

The Intel® Tigerlake microarchitecture provides measurements of the current energy consumption through the RAPL interface.

Counters

Counter name	Event name
PWR0	PWR_PKG_ENERGY
PWR1	PWR_PP0_ENERGY
PWR2	PWR_PP1_ENERGY
PWR3	PWR_DRAM_ENERGY
PWR4	PWR_PLATFORM_ENERGY