NI RFSG Clock Attributes
- Advanced
- NIRFSG_ATTR_ARB_ONBOARD_SAMPLE_CLOCK_MODE
- NIRFSG_ATTR_ARB_SAMPLE_CLOCK_RATE
- NIRFSG_ATTR_ARB_SAMPLE_CLOCK_SOURCE
- NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE
- NIRFSG_ATTR_EXPORTED_REF_CLOCK_OUTPUT_TERMINAL
- NIRFSG_ATTR_REF_CLOCK_RATE
- NIRFSG_ATTR_REF_CLOCK_SOURCE
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150089 | ViInt32 | R/W | None | None |
Specifies the oscillator phase digital-to-analog converter (DAC) value on the arbitrary waveform generator (AWG). Use this attribute to reduce the trigger jitter when synchronizing multiple devices with NI-TClk. This attribute can also help maintain synchronization repeatability by writing a previous measurement's phase DAC value to the current session. This attribute is applicable only when using the NIRFSG_ATTR_ARB_SAMPLE_CLOCK_SOURCE attribute set to NIRFSG_VAL_CLK_IN_STR.
Supported Devices: PXIe-5673/5673E
Related Topics
NI-TClk Overview
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150029 | ViInt32 | R/W | None | None |
Specifies the Sample Clock mode on the device. To set this attribute, the device must be in the Configuration state.
PXIe-5644/5645/5646, PXIe-5820/5830/5831/5832/5840/5841: NIRFSG_VAL_DIVIDE_DOWN is the only supported value for this device.
Valid Values:
| NIRFSG_VAL_HIGH_RESOLUTION | Sample rates are generated by a high-resolution clock. |
|---|---|
| NIRFSG_VAL_DIVIDE_DOWN | Sample rates are generated by dividing the source frequency. |
| Default Values: |
PXIe-5644/5645/5646, PXI-5670/5671, PXIe-5672, PXIe-5820/5830/5831/5832/5840/5841: NIRFSG_VAL_DIVIDE_DOWN
PXIe-5673/5673E: NIRFSG_VAL_HIGH_RESOLUTION
 |
Note Using the high resolution clock may result in increased phase noise. |
|---|---|
| Supported Devices: PXIe-5644/5645/5646, PXI-5670/5671, PXIe-5672/5673/5673E, PXIe-5820/5830/5831/5832/5840/5841 |
Related Topics
Clocking Modes
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150031 | ViReal64 | RO | None | None |
Returns the rate of the Sample Clock on the device.
Units: hertz (Hz)
Supported Devices: PXIe-5644/5645/5646, PXI-5670/5671, PXIe-5672/5673/5673E, PXIe-5820/5830/5831/5832/5840/5841
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150030 | ViString | R/W | None | None |
Specifies the Sample Clock source for the device. To set this attribute, the NI-RFSG device must be in the Configuration state.
PXIe-5644/5645/5646, PXIe-5820/5830/5831/5832/5840/5841: NIRFSG_VAL_ONBOARD_CLK_STR is the only supported value for this device.
Defined Values:
| NIRFSG_VAL_ONBOARD_CLK_STR | Uses the AWG module onboard clock as the Sample Clock source. |
|---|---|
| NIRFSG_VAL_CLK_IN_STR | Uses the external clock as the Sample Clock source. |
| Default Value: NIRFSG_VAL_ONBOARD_CLK_STR |
Supported Devices: PXIe-5644/5645/5646, PXI-5670/5671, PXIe-5672/5673/5673E, PXIe-5820/5830/5831/5832/5840/5841
Related Topics
Timing Configurations
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150004 | ViString | R/W | None | niRFSG_ConfigurePXIChassisClk10 |
Specifies the clock source for driving the PXI 10 MHz backplane Reference Clock. This attribute is configurable if the PXI-5610 upconverter module is installed in only Slot 2 of a PXI chassis. To set this attribute, the NI-RFSG device must be in the Configuration state.
Only certain combinations of this attribute and the NIRFSG_ATTR_REF_CLOCK_SOURCE attribute are valid, as shown in the following table.
| NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE Setting | NIRFSG_ATTR_REF_CLOCK_SOURCE Setting |
|---|---|
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_ONBOARD_CLK_STR | NIRFSG_VAL_ONBOARD_CLK_STR |
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_REF_IN_STR | NIRFSG_VAL_REF_IN_STR |
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_REF_IN_STR | NIRFSG_VAL_PXI_CLK_STR |
| Defined Values: |
| Value | Description |
|---|---|
| NIRFSG_VAL_NONE_STR | Do not drive the PXI_CLK10 signal. |
| NIRFSG_VAL_ONBOARD_CLK_STR | Uses the highly stable oven-controlled onboard Reference Clock to drive the PXI_CLK signal. |
| NIRFSG_VAL_REF_IN_STR | Uses the clock present at the front panel REF IN connector to drive the PXI_CLK signal. |
| Default Value: NIRFSG_VAL_NONE_STR |
Supported Devices: PXI-5610, PXI-5670/5671
Related Topics
Timing Configurations
System Reference Clock
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150053 | ViString | R/W | None | None |
Specifies the destination terminal for exporting the Reference Clock on the RF signal generators. To set this attribute, the NI-RFSG device must be in the Configuration state.
Defined Values:
| Value | Description |
|---|---|
| NIRFSG_VAL_DO_NOT_EXPORT_STR | The Reference Clock signal is not exported. |
| NIRFSG_VAL_REF_OUT_STR | Exports the Reference Clock signal to the REF OUT connector of the device. |
| NIRFSG_VAL_REF_OUT2_STR | Exports the Reference Clock signal to the REF OUT2 connector of the device, if applicable. |
| NIRFSG_VAL_CLK_OUT_STR | Exports the Reference Clock signal to the CLK OUT connector of the device. |
| Default Value: NIRFSG_VAL_DO_NOT_EXPORT_STR |
Supported Devices: PXIe-5644/5645/5646, PXI/PXIe-5650/5651/5652, PXIe-5653/5654/5654 with PXIe-5696, PXIe-5673/5673E, PXIe-5820/5830/5831/5832/5840/5841
| Defined Output Terminal Values | Supported on PXIe-5644/5645/5646, PXIe-5820/5830/5831/5832/5840/5841 | Supported on PXI/PXIe-5650/5651/56521 | Supported on PXIe-5653/5654/5654 with PXIe-5696 | Supported on PXIe-5673 | Supported on PXIe-5673E |
|---|---|---|---|---|---|
| NIRFSG_VAL_REF_OUT_STR | √ | √ | √ | √ | √ |
| NIRFSG_VAL_REF_OUT2_STR | — | √ | √ | — | √ |
| NIRFSG_VAL_CLK_OUT_STR | — | — | — | √ | √ |
| NIRFSG_VAL_DO_NOT_EXPORT_STR | √ | √ | √ | √ | √ |
1The NIRFSG_VAL_REF_OUT2_STR output terminal value is valid for only the PXIe-5650/5651/5652, not the PXI-5650/5651/5652.
Related Topics
Interconnecting Multiple NI 5673E Modules
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1250322 | ViReal64 | R/W | None | niRFSG_ConfigureRefClock |
Specifies the Reference Clock rate, in Hz, of the signal present at the REF IN or CLK IN connector. This property is only valid when the NIRFSG_ATTR_REF_CLOCK_SOURCE attribute is set to NIRFSG_VAL_CLK_IN_STR, NIRFSG_VAL_REF_IN_STR, or NIRFSG_VAL_REF_IN_2_STR.
To set this attribute, the NI-RFSG device must be in the Configuration state. If you are using the PXIe-5654/5654 with PXIe-5696, the NI-RFSG device must be in the Committed state to read this attribute. When you read this attribute, it returns the frequency the device is locked to during the Committed state.
If you set this attribute to NIRFSG_VAL_AUTO, NI-RFSG uses the default Reference Clock rate for the device or automatically detects the Reference Clock rate if automatic detection is supported by the device.
|
Note Automatic detection of the Reference Clock rate is supported on only the PXIe-5654/5654 with PXIe-5696. For all other supported devices, NI-RFSG uses the default Reference Clock rate of 10 MHz. |
|---|---|
| Valid Values: |
PXIe-5654/5654 with PXIe-5696: Values between 1 MHz to 20 MHz in 1 MHz steps are supported in addition to the NIRFSG_VAL_AUTO and NIRFSG_VAL_10MHZ values.
PXIe-5841 with PXIe-5655: 10 MHz, 100 MHz, 270 MHz, and 3.84 MHz * y, where y is 4, 8, 16, 24, 25, or 32.
Defined Values:
| NIRFSG_VAL_AUTO | Uses the default Reference Clock rate for the device or automatically detects the Reference Clock rate if the device supports it. |
|---|---|
| NIRFSG_VAL_10MHZ | Uses a 10 MHz Reference Clock rate. |
| Units: hertz (Hz) |
Default Value: NIRFSG_VAL_AUTO
Supported Devices: PXI-5610, PXIe-5644/5645/5646, PXI/PXIe-5650/5651/5652, PXIe-5653/5654/5654 with PXIe-5696, PXI-5670/5671, PXIe-5672/5673/5673E, PXIe-5820/5830/5831/5832/5840/5841
Related Topics
Timing Configurations
| Numeric Value | Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|---|
| 1150001 | ViString | R/W | None | niRFSG_ConfigureRefClock |
Specifies the Reference Clock source. To set this attribute, the NI-RFSG device must be in the Configuration state. Only certain combinations of this attribute and the NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE attribute are valid, as shown in the following table.
|
Note The PXI-5670/5671 and PXIe-5672 devices also allow you to drive the PXI 10 MHz backplane clock on PXI chassis only using the NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE attribute. |
|---|---|
| Defined Values: |
| NIRFSG_VAL_ONBOARD_CLOCK_STR | Uses the onboard Reference Clock as the clock source. **PXIe-5830/5831—**For the PXIe-5830, connect the PXIe-5820 REF IN connector to the PXIe-3621 REF OUT connector. For the PXIe-5831/5832, connect the PXIe-5820 REF IN connector to the PXIe-3622 REF OUT connector. **PXIe-5831/5832 with PXIe-5653—**Connect the PXIe-5820 REF IN connector to the PXIe-3622 REF OUT connector. Connect the PXIe-5653 REF OUT (10 MHz) connector to the PXIe-3622 REF IN connector. **PXIe-5841 with PXIe-5655—**Lock to the PXIe-5655 onboard clock. Connect the REF OUT connector on the PXIe-5655 to the PXIe-5841 REF IN connector. |
|---|---|
| NIRFSG_VAL_CLK_IN_STR | Uses the clock signal present at the front panel CLK IN connector as the Reference Clock source. This value is not valid for the PXIe-5644/5645/5646 or PXIe-5820/5830/5831/5831 with PXIe-5653/5832/5832 with PXIe-5653/5840/5841/5841 with PXIe-5655. |
| NIRFSG_VAL_REF_IN_STR | Uses the clock signal present at the front panel REF IN connector as the Reference Clock source. **PXIe-5830/5831—**For the PXIe-5830, connect the PXIe-5820 REF IN connector to the PXIe-3621 REF OUT connector. For the PXIe-5831/5832, connect the PXIe-5820 REF IN connector to the PXIe-3622 REF OUT connector. For the PXIe-5830, lock the external signal to the PXIe-3621 REF IN connector. For the PXIe-5831/5832, lock the external signal to the PXIe-3622 REF IN connector. **PXIe-5831/5832 with PXIe-5653—**Connect the PXIe-5820 REF IN connector to the PXIe-3622 REF OUT connector. Connect the PXIe-5653 REF OUT (10 MHz) connector to the PXIe-3622 REF IN connector. Lock the external signal to the PXIe-5653 REF IN connector. **PXIe-5841 with PXIe-5655—**Lock to the signal at the REF IN connector on the associated PXIe-5655. Connect the PXIe-5655 REF OUT connector to the PXIe-5841 REF IN connector. |
| NIRFSG_VAL_PXI_CLK_STR | Uses the PXI_CLK signal, which is present on the PXI backplane, as the Reference Clock source. |
| NIRFSG_VAL_REF_IN_2_STR | This value is not valid on any supported devices. |
| NIRFSG_VAL_PXI_CLK_MASTER_STR | This value is valid on only the PXIe-5831/5832 with PXIe-5653. **PXIe-5831/5832 with PXIe-5653—**NI-RFSG configures the PXIe-5653 to export the Reference clock and configures the PXIe-5820 and PXIe-3622 to use NIRFSG_VAL_PXI_CLK_STR as the Reference Clock source. Connect the PXIe-5653 REF OUT (10 MHz) connector to the PXI chassis REF IN connector. |
| Default Value: NIRFSG_VAL_ONBOARD_CLOCK_STR |
Supported Devices: PXI-5610, PXIe-5644/5645/5646, PXI/PXIe-5650/5651/5652, PXIe-5653/5654/5654 with PXIe-5696, PXI-5670/5671, PXIe-5672/5673/5673E, PXIe-5820/5830/5831/5832/5840/5841
Related Topics
Timing Configurations