firtool-1.93.0

What's Changed

• [Moore] Add explicit truncation and zero/sign-extension by @fabianschuiki in #7783
• [ESI][Services] Type comparisons should account for 'any' by @teqdruid in #7774
• [ESI][Services] Standard host memory service by @teqdruid in #7775
• [FIRRTL] InferRW: copy all attributes of masked memeories by @youngar in #7793
• [SMT] Add reset op by @TaoBi22 in #7791
• [FIRRTL] Make memory matadata work with layers by @seldridge in #7789
• [ESI][Runtime] Fix wheel builds by @teqdruid in #7795
• [FIRRTL] Only emit retime metadata for design by @seldridge in #7798
• [FIRRTL] Only add SiTest metadata for design by @seldridge in #7799
• [firtool] mv LoweLayers after CreateSiFiveMetadata by @seldridge in #7794
• [FIRRTL] Emitting EICG wrapper warning only once by @prithayan in #7785
• [FIRRTL] Don't force non-local trackers in Dedup. by @mikeurbach in #7709
• [FIRRTL] FIRParser: Speed up creation subaccess operations by @youngar in #7802
• [circt-verilog] Support MLIR and MLIRBC input files by @fabianschuiki in #7787
• [FIRRTL] Run canonicalizer again after IMCP by @rwy7 in #7796
• Revert "[FIRRTL] Don't force non-local trackers in Dedup." by @mikeurbach in #7805
• [FIRRTL] Add layer support to ExtractInstances by @seldridge in #7807
• [HW] Add a verifier for HWInstanceLike by @prithayan in #7782
• [ESI] Implement basic hostmem reads lacking a bunch of functionality by @teqdruid in #7803
• [FIRRTL] Bump nextFIRVersion to 4.0.0 in the parser by @fabianschuiki in #7808
• [FIRRTL] Move LowerLayers after ExtractInstances by @seldridge in #7809
• [FIRRTL] Document how to deal with specification releases by @fabianschuiki in #7811
• [HandshakeToDC] Add pack/unpack lowering patterns by @mortbopet in #6941
• [Transform] Create memory banks for memories used inside affine parallel loops by @jiahanxie353 in #7804
• [firtool] Run CSE on classes by @youngar in #7814
• [FIRRTL] Dedup: speed up handling of instances by @youngar in #7815
• [FIRRTL] Dedup: record less indices when hashing by @youngar in #7816
• [ExportVerilog] Do not inline non-procedural continuous assignments to variables by @fzi-hielscher in #7817
• [Seq] FIFO: permit any type and add read latency by @teqdruid in #7810
• [PyCDE] Binding for FIFOs by @teqdruid in #7806

Full Changelog: firtool-1.92.0...firtool-1.93.0