firtool-1.96.0

What's Changed

• [VerifToSMT] Only update registers on clock posedge by @TaoBi22 in #7878
• [Verif] Require a clock when num_regs is non-zero on a BMC op by @TaoBi22 in #7891
• [Ibis] Rename to 'Kanagawa' by @teqdruid in #7832
• [firtool] Run LowerFormalToHW pass when emitting SV by @fabianschuiki in #7837
• [firtool] Fix formal test by @fabianschuiki in #7894
• SCF IndexSwitch to nested If-Else by @jiahanxie353 in #7670
• [CI] Bump integration test image to 18.0 by @fabianschuiki in #7895
• [FIRRTL] Make IMDCE work for ops w/ regions/blocks by @seldridge in #7881
• [circt-test] fix lit config for circt-bmc by @unlsycn in #7884
• [circt-bmc] Drop outdated integration test by @TaoBi22 in #7898
• [circt-bmc][VerifToSMT] Pop existing assertions on each cycle by @TaoBi22 in #7900
• [FIRRTL] Cleanup transform includes, NFC by @seldridge in #7901
• [circt-test] fix lit config for circt-bmc by @unlsycn in #7897
• SCF IndexSwitch to nested If-Else by @jiahanxie353 in #7905
• [FIRRTL] Remove all traces of OMIR JSON support. by @mikeurbach in #7907
• [DC] Add CAPI bindings for DC by @teqdruid in #7906
• [FIRRTL] Rip out OMIRTracker and logic that uses it. by @mikeurbach in #7908
• [SCFToCalyx] remove redundant build switch group by @jiahanxie353 in #7910
• [HandshakeToDC] Getting some working tests by @teqdruid in #7858
• [PyCDE][Handshake] Add bindings for Handshake functions by @teqdruid in #7849
• [FIRRTL] FoldRegMems: insert new ops into same block as memory by @rwy7 in #7909
• [HW] ExportHier: do not include bound in modules by @youngar in #7915
• [ImportVerilog] add stream concat operation by @chenbo-again in #7784
• [FIRRTL] FoldUnusedBits: Cast compressed data back to signed integer by @rwy7 in #7913
• [FIRRTL] FoldUnusedBits: minor cleanup by @rwy7 in #7914
• [Calyx] Lower Arith CmpFOp to Calyx by @jiahanxie353 in #7860
• [HWToSMT] ArrayCreateOp and ArrayGetOp support by @maerhart in #7666
• [circt-bmc] Add a simple test with a register storing an aggregate by @maerhart in #7922
• [circt-bmc][VerifToSMT] Add initial value support by @TaoBi22 in #7903
• [Calyx] Avoid using designated initializers by @TaoBi22 in #7926
• [VerifToSMT] Exit early after too many clocks error by @TaoBi22 in #7923
• [SMT] Add set_logic operation by @TaoBi22 in #7927
• [FIRRTL] Support layers in MergeConnections by @seldridge in #7912
• Fix URL for firrtl spec by @sequencer in #7919
• [RTG] Add TestOp, TargetOp, and DictType by @maerhart in #7856

New Contributors

• @unlsycn made their first contribution in #7884
• @chenbo-again made their first contribution in #7784

Full Changelog: firtool-1.95.1...firtool-1.96.0

firtool-1.95.1

This reverts a change to a canonicalizer which could create use-before-def. This wasn't observed with internal testing, but the risk remains.

Full Changelog: firtool-1.95.0...firtool-1.95.1

firtool-1.95.0

What's Changed

• [RTG] Add set type and operations by @maerhart in #7848
• [RTG] Add op and type visitors by @maerhart in #7855
• [HWToBTOR2] Use APInt value directly in constant generation by @TaoBi22 in #7853
• [HWToBTOR2] Avoid duplicating initial consts by @TaoBi22 in #7854
• [SeqToSV] Do not use always_ff for compreg with initializer by @fzi-hielscher in #7838
• [NFC] Output unused test results to /dev/null by @fzi-hielscher in #7859
• [SCFToCalyx] buildLibraryBinaryPipeOp source operation result replacement by @jiahanxie353 in #7862
• [ImportVerilog]: Create variables for function arguments by @Max-astro in #7829
• [NFCI][HWToBTOR2] Avoid running HWToBTOR2 pass in parallel by @fzi-hielscher in #7864
• [FIRRTL] Lower firrtl.formal to verif.formal by @fabianschuiki in #7836
• [Handshake][Python] Add Python bindings for Handshake by @teqdruid in #7846
• [Verif] Make verif.formal parameters an ODS property by @fabianschuiki in #7867
• [circt-test] Add runner for circt-bmc by @fabianschuiki in #7857
• [HandshakeToDC] Implement ESIInstanceOp lowering by @teqdruid in #7871
• Bump LLVM to 3cc852ece438a63e7b09d1c84a81d21598454e1a. by @mikeurbach in #7847
• [HWToBTOR2] Error on variadic ops (for now) by @TaoBi22 in #7866
• [SMT] Add push/pop operations by @TaoBi22 in #7865
• [SMT] Add SMTLIB export for push & pop operations by @TaoBi22 in #7873
• [SMT] Add integration tests for smt.reset by @TaoBi22 in #7874
• [FIRRTL] Dedup: dedup private modules into public ones by @youngar in #7877
• [FIRRTL] LowerTypes: Manually compact newArgs vector by @rwy7 in #7869
• [FIRRTL] Rewrite, extend CheckLayers for GC Views by @seldridge in #7879
• [FIRRTL] FoldRegMems: insert new ops into same block as memory by @rwy7 in #7868

New Contributors

• @Max-astro made their first contribution in #7829

Full Changelog: firtool-1.94.0...firtool-1.95.0

firtool-1.94.0

What's Changed

• [FIRRTL] Update, fix parser versions by @seldridge in #7827
• [FIRRTL] LowerClasses: drop the IR mapping by @rwy7 in #7824
• [Calyx] Lower SCF parallel op to Calyx by @jiahanxie353 in #7830
• [FIRRTL] LowerTypes: Manually compact newArgs vector by @rwy7 in #7831
• [HWToBTOR2][NFC] update 'PowerOn' in error message and comments by @TaoBi22 in #7845
• [HandshakeToDC] Add clock and reset ports by @teqdruid in #7825
• [CAPI][Python][Arc, HW] Register Arc and HW passes by @yassinz in #7790
• [Calyx] Binary Floating Point MulF Operator by @jiahanxie353 in #7769
• [RTG] Add Random Test Generation dialect by @maerhart in #7833
• [RTG] Add sequence_closure and invoke_sequence operations by @maerhart in #7839
• [RTG] Add context resource interfaces by @maerhart in #7840
• [RTGTest] Add RTGTest dialect by @maerhart in #7841
• [HWToBTOR2] Fix slice lowering argument meanings by @TaoBi22 in #7842
• [ExternalizeRegisters][NFC] Clean up initial value fetching by @TaoBi22 in #7843
• [HWToBTOR2] Fix crashes on initial value corner cases by @TaoBi22 in #7844
• [HWToBTOR2] Swap to temp file placeholder by @TaoBi22 in #7852

New Contributors

• @yassinz made their first contribution in #7790

Full Changelog: firtool-1.93.1...firtool-1.94.0

firtool-1.93.1

What's Changed

• [FIRRTL] Accept list of parameters for formal construct by @fabianschuiki in #7813
• [Handshake] Adding func instance op for integration by @teqdruid in #7812
• [FIRRTL] Dedup: hash modules back->front by @rwy7 in #7820
• [FIRRTL] Refactor class lowering to avoid unnecessary cloning by @mikeurbach in #7823
• [hlstool] Add option to use the DC lowering flow by @teqdruid in #7819

Full Changelog: firtool-1.93.0...firtool-1.93.1

firtool-1.93.0

What's Changed

• [Moore] Add explicit truncation and zero/sign-extension by @fabianschuiki in #7783
• [ESI][Services] Type comparisons should account for 'any' by @teqdruid in #7774
• [ESI][Services] Standard host memory service by @teqdruid in #7775
• [FIRRTL] InferRW: copy all attributes of masked memeories by @youngar in #7793
• [SMT] Add reset op by @TaoBi22 in #7791
• [FIRRTL] Make memory matadata work with layers by @seldridge in #7789
• [ESI][Runtime] Fix wheel builds by @teqdruid in #7795
• [FIRRTL] Only emit retime metadata for design by @seldridge in #7798
• [FIRRTL] Only add SiTest metadata for design by @seldridge in #7799
• [firtool] mv LoweLayers after CreateSiFiveMetadata by @seldridge in #7794
• [FIRRTL] Emitting EICG wrapper warning only once by @prithayan in #7785
• [FIRRTL] Don't force non-local trackers in Dedup. by @mikeurbach in #7709
• [FIRRTL] FIRParser: Speed up creation subaccess operations by @youngar in #7802
• [circt-verilog] Support MLIR and MLIRBC input files by @fabianschuiki in #7787
• [FIRRTL] Run canonicalizer again after IMCP by @rwy7 in #7796
• Revert "[FIRRTL] Don't force non-local trackers in Dedup." by @mikeurbach in #7805
• [FIRRTL] Add layer support to ExtractInstances by @seldridge in #7807
• [HW] Add a verifier for HWInstanceLike by @prithayan in #7782
• [ESI] Implement basic hostmem reads lacking a bunch of functionality by @teqdruid in #7803
• [FIRRTL] Bump nextFIRVersion to 4.0.0 in the parser by @fabianschuiki in #7808
• [FIRRTL] Move LowerLayers after ExtractInstances by @seldridge in #7809
• [FIRRTL] Document how to deal with specification releases by @fabianschuiki in #7811
• [HandshakeToDC] Add pack/unpack lowering patterns by @mortbopet in #6941
• [Transform] Create memory banks for memories used inside affine parallel loops by @jiahanxie353 in #7804
• [firtool] Run CSE on classes by @youngar in #7814
• [FIRRTL] Dedup: speed up handling of instances by @youngar in #7815
• [FIRRTL] Dedup: record less indices when hashing by @youngar in #7816
• [ExportVerilog] Do not inline non-procedural continuous assignments to variables by @fzi-hielscher in #7817
• [Seq] FIFO: permit any type and add read latency by @teqdruid in #7810
• [PyCDE] Binding for FIFOs by @teqdruid in #7806

Full Changelog: firtool-1.92.0...firtool-1.93.0

firtool-1.92.0

What's Changed

• [LTL] Canonicalize ltl.and to comb.and for i1 properties by @fabianschuiki in #7759
• [FIRRTL] Fix folding of when conditions into LTL properties by @fabianschuiki in #7760
• [FIRRTL] Make sym_name an inherent attr for symbol ops by @youngar in #7765
• [SV] Use SymbolOpUserInterface to speed up verifiers by @youngar in #7768
• [HW] InnerSymbolTable: only check top-level ops for portlists by @youngar in #7767
• [Calyx] Passing memories by reference by @jiahanxie353 in #7164
• [circt-test] Add simple runner interface for choosing modes and depth by @leonardt in #7763
• Bump LLVM to 8193832fb988e3df1e8e726634783805dca8d9b6. by @mikeurbach in #7749
• [Calyx] constant op by @jiahanxie353 in #7770
• [MooreToCore] Add support for moore::string_constant #7628 by @jpinot in #7752
• [FIRRTL] ReplSeqMems: use the original mem name for the instance name by @youngar in #7776
• [FIRRTL] Add new ModulePrefixAnnotation by @youngar in #7772
• [HW] Make module's doNotPrint a UnitAttr by @rwy7 in #7777
• [FreezePaths] Add support for HWInstanceLike, instead of only HWInstanceOp by @prithayan in #7778
• [FIRRTL] Return an empty ArrayRef, not an array of 1 attr by @rwy7 in #7779
• [FIRRTL] use properties in some builders and parsers by @youngar in #7766
• [firtool] Run layer merge after inliner by @rwy7 in #7780

New Contributors

• @jpinot made their first contribution in #7752

Full Changelog: firtool-1.91.0...firtool-1.92.0

firtool-1.91.0

What's Changed

• [FIRRTL] Remove validation from type inference code by @youngar in #7747
• [Arc] Improve LowerState to never produce read-after-write conflicts by @fabianschuiki in #7703
• [Arc] Remove obsolete arc.clock_tree and arc.passthrough ops by @fabianschuiki in #7704
• [arcilator] Add clock divider integration test by @fabianschuiki in #7705
• [Verif] Adjust contract ops to match documentation by @fabianschuiki in #7745
• [AIGToComb] [circt-synth] Add a AIG to Comb conversion pass by @uenoku in #7742
• [OM] Add a new API to update fields of a ClassOp by @prithayan in #7748
• [FIRRTL][LowerTypes] Keep the order of bundle fields in lowered cat by @SpriteOvO in #6376
• [FIRRTL] enable properties for inherent attributes by @youngar in #7750
• Calyx ConstantOp Support by @jiahanxie353 in #7086
• Transform Flatten Memref Load by @jiahanxie353 in #7298
• [Verif][NFC] Use auto-generated constructors for all passes by @fabianschuiki in #7754
• Flatten memref GetGlobal and Global operations by @jiahanxie353 in #7093
• [circt-test] Add test discovery classes and -l option by @fabianschuiki in #7755
• [circt-test] Add simple SymbiYosys test runner by @fabianschuiki in #7756
• [HW] Add port name accessors to HWInstanceLike by @maerhart in #7757
• Flatten memref Global and its corresponding GetGlobal operations by @jiahanxie353 in #7758
• Calyx Binary Floating Point AddF Operator by @jiahanxie353 in #7089
• [SCFToCalyx] Build control for nested if operation by @jiahanxie353 in #7669
• [Verif] Add ignore attribute to formal by @leonardt in #7719

Full Changelog: firtool-1.90.1...firtool-1.91.0

firtool-1.90.1

What's Changed

• [Verif] Add LowerFormalToHW pass by @leonardt in #7707
• [CombFolds] Preserve two-state attribute in narrowOperationWidth by @fzi-hielscher in #7712
• Bump LLVM to 92663defb1c27d809f644752d65d8ccff93a7054. by @mikeurbach in #7714
• [ESI] Promote and generalize 'channel assignments' by @teqdruid in #7715
• [docs] Fix broken image links in docs by @Ivecia in #7710
• [FIRRTL] Convert CheckLayers to use InstanceInfo by @seldridge in #7635
• [OM] Rework ClassOp to use fields terminator by @leonardt in #7537
• [HW][Seq] Allow typed attr to be an element of aggregate_constant and make seq.const_clock typed attr by @uenoku in #7718
• Advanced LayerSink by @rwy7 in #7548
• [FIRRTL] Use InstanceInfo in CreateSiFiveMetadata by @seldridge in #7720
• [FIRRTL][LayerSink] Fix: initialize an unitialized bool member by @rwy7 in #7724
• [HWToSMT] Proper error message for 0-bit constants by @maerhart in #7727
• [circt-bmc] Add simple initial value support to ExternalizeRegisters by @TaoBi22 in #7728
• Reject '<=' and 'is invalid' if FIRRTL version >=3 by @seldridge in #7733
• [FIRRTL] clean up interfaces for supporting properties by @youngar in #7734
• Use properties for attributes for many dialects by @youngar in #7736
• [AIG][circt-synth] Add a boilarplate for the dialect and tool by @uenoku in #7737
• [AIG] Add AndInverterOp by @uenoku in #7738
• [AIG] Add LowerVariadic and LowerWordToBits passes by @uenoku in #7739
• [CombToAIG] Add CombToAIG conversion pass by @uenoku in #7740
• [circt-synth] Populate pipelines until AIG lowering by @uenoku in #7741
• [AIG] Add CutOp by @uenoku in #7743
• [circt-lec] Register Verif dialect by @uenoku in #7744
• [circt-bmc] Add initial_values attribute to BMC op by @TaoBi22 in #7729
• [Verif] Add contract examples to dialect doc by @fabianschuiki in #7723
• [OM] Add ClassOp region verifier by @seldridge in #7746

New Contributors

• @Ivecia made their first contribution in #7710

Full Changelog: firtool-1.89.0...firtool-1.90.1

firtool-1.89.0

What's Changed

• [Verif] Simplify the FormalOp by @fabianschuiki in #7691
• [Sim][NFC] Include InferTypeOpInterface in SimOps.td by @fabianschuiki in #7693
• [MooreToCore] Support assert, assume, cover ops by @mingzheTerapines in #7681
• [MooreToCore] Add support for format strings and display task by @fabianschuiki in #7694
• [ExtractInstances] Add the extract instances metadata to OM Classes by @prithayan in #7667
• [FIRRTL] collection of changes to InferWidths by @youngar in #7686
• [FIRRTL] InferWidths: fix invalid frame reference by @youngar in #7697
• [ArcToLLVM] Add support for index dialect by @fabianschuiki in #7699
• [Arc] Add arc.final op by @fabianschuiki in #7700
• [Arc] Make arc.model have an SSACFG region by @fabianschuiki in #7701
• Remove redundant CMakeLists.txt entry by @leonardt in #7696
• [FIRRTL][ProbesToSignals] RWProbe support by @dtzSiFive in #7706
• [Arc] Add dominance-aware pass to sink ops and merge scf.if ops by @fabianschuiki in #7702

Full Changelog: firtool-1.88.0...firtool-1.89.0